x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / imx27-pdk.dts
blob96f442ba6d2259d3d9ea229ea64c07b657a9c70a
1 /*
2  * Copyright 2012 Sascha Hauer, Pengutronix
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
12 /dts-v1/;
13 #include "imx27.dtsi"
15 / {
16         model = "Freescale i.MX27 Product Development Kit";
17         compatible = "fsl,imx27-pdk", "fsl,imx27";
19         memory {
20                 reg = <0xa0000000 0x08000000>;
21         };
23         usbphy {
24                 compatible = "simple-bus";
25                 #address-cells = <1>;
26                 #size-cells = <0>;
28                 usbphy0: usbphy@0 {
29                         compatible = "usb-nop-xceiv";
30                         reg = <0>;
31                         clocks = <&clks IMX27_CLK_DUMMY>;
32                         clock-names = "main_clk";
33                 };
34         };
37 &cspi2 {
38         pinctrl-names = "default";
39         pinctrl-0 = <&pinctrl_cspi2>;
40         cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
41         status = "okay";
43         pmic: mc13783@0 {
44                 compatible = "fsl,mc13783";
45                 reg = <0>;
46                 spi-cs-high;
47                 spi-max-frequency = <1000000>;
48                 interrupt-parent = <&gpio3>;
49                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
51                 regulators {
52                         vgen_reg: vgen {
53                                 regulator-min-microvolt = <1500000>;
54                                 regulator-max-microvolt = <1500000>;
55                                 regulator-always-on;
56                                 regulator-boot-on;
57                         };
59                         vmmc1_reg: vmmc1 {
60                                 regulator-min-microvolt = <1600000>;
61                                 regulator-max-microvolt = <3000000>;
62                         };
64                         gpo1_reg: gpo1 {
65                                 regulator-always-on;
66                                 regulator-boot-on;
67                         };
69                         gpo3_reg: gpo3 {
70                                 regulator-always-on;
71                                 regulator-boot-on;
72                         };
73                 };
74         };
77 &fec {
78         phy-mode = "mii";
79         pinctrl-names = "default";
80         pinctrl-0 = <&pinctrl_fec>;
81         status = "okay";
84 &kpp {
85         linux,keymap = <
86                 MATRIX_KEY(0, 0, KEY_UP)
87                 MATRIX_KEY(0, 1, KEY_DOWN)
88                 MATRIX_KEY(1, 0, KEY_RIGHT)
89                 MATRIX_KEY(1, 1, KEY_LEFT)
90                 MATRIX_KEY(1, 2, KEY_ENTER)
91                 MATRIX_KEY(2, 0, KEY_F6)
92                 MATRIX_KEY(2, 1, KEY_F8)
93                 MATRIX_KEY(2, 2, KEY_F9)
94                 MATRIX_KEY(2, 3, KEY_F10)
95         >;
96         status = "okay";
99 &nfc {
100         pinctrl-names = "default";
101         pinctrl-0 = <&pinctrl_nand>;
102         nand-ecc-mode = "hw";
103         nand-on-flash-bbt;
104         status = "okay";
107 &uart1 {
108         uart-has-rtscts;
109         pinctrl-names = "default";
110         pinctrl-0 = <&pinctrl_uart1>;
111         status = "okay";
114 &usbotg {
115         pinctrl-names = "default";
116         pinctrl-0 = <&pinctrl_usbotg>;
117         dr_mode = "otg";
118         fsl,usbphy = <&usbphy0>;
119         phy_type = "ulpi";
120         status = "okay";
123 &iomuxc {
124         imx27-pdk {
125                 pinctrl_cspi2: cspi2grp {
126                         fsl,pins = <
127                                 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
128                                 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
129                                 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
130                                 MX27_PAD_CSPI2_SS0__GPIO4_21    0x0 /* SPI2 CS0 */
131                                 MX27_PAD_TOUT__GPIO3_14         0x0 /* PMIC IRQ */
132                         >;
133                 };
135                 pinctrl_fec: fecgrp {
136                         fsl,pins = <
137                                 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
138                                 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
139                                 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
140                                 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
141                                 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
142                                 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
143                                 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
144                                 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
145                                 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
146                                 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
147                                 MX27_PAD_ATA_DATA8__FEC_CRS 0x0
148                                 MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
149                                 MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
150                                 MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
151                                 MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
152                                 MX27_PAD_ATA_DATA13__FEC_COL 0x0
153                                 MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
154                                 MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
155                         >;
156                 };
158                 pinctrl_nand: nandgrp {
159                         fsl,pins = <
160                                 MX27_PAD_NFRB__NFRB     0x0
161                                 MX27_PAD_NFCLE__NFCLE   0x0
162                                 MX27_PAD_NFWP_B__NFWP_B 0x0
163                                 MX27_PAD_NFCE_B__NFCE_B 0x0
164                                 MX27_PAD_NFALE__NFALE   0x0
165                                 MX27_PAD_NFRE_B__NFRE_B 0x0
166                                 MX27_PAD_NFWE_B__NFWE_B 0x0
167                         >;
168                 };
170                 pinctrl_uart1: uart1grp {
171                         fsl,pins = <
172                                 MX27_PAD_UART1_TXD__UART1_TXD 0x0
173                                 MX27_PAD_UART1_RXD__UART1_RXD 0x0
174                                 MX27_PAD_UART1_CTS__UART1_CTS 0x0
175                                 MX27_PAD_UART1_RTS__UART1_RTS 0x0
176                         >;
177                 };
179                 pinctrl_usbotg: usbotggrp {
180                         fsl,pins = <
181                                 MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
182                                 MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
183                                 MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
184                                 MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
185                                 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
186                                 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
187                                 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
188                                 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
189                                 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
190                                 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
191                                 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
192                                 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
193                         >;
194                 };
195         };