x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / imx6q-tx6q-11x0-mb7.dts
blobd78b129d01ea492d6b65e3885ca7974a0225c269
1 /*
2  * Copyright 2016 Lothar Waßmann <LW@KARO-electronics.de>
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License
11  *     version 2 as published by the Free Software Foundation.
12  *
13  *     This file is distributed in the hope that it will be useful,
14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *     GNU General Public License for more details.
17  *
18  * Or, alternatively,
19  *
20  *  b) Permission is hereby granted, free of charge, to any person
21  *     obtaining a copy of this software and associated documentation
22  *     files (the "Software"), to deal in the Software without
23  *     restriction, including without limitation the rights to use,
24  *     copy, modify, merge, publish, distribute, sublicense, and/or
25  *     sell copies of the Software, and to permit persons to whom the
26  *     Software is furnished to do so, subject to the following
27  *     conditions:
28  *
29  *     The above copyright notice and this permission notice shall be
30  *     included in all copies or substantial portions of the Software.
31  *
32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39  *     OTHER DEALINGS IN THE SOFTWARE.
40  */
42 /dts-v1/;
43 #include "imx6q.dtsi"
44 #include "imx6qdl-tx6.dtsi"
46 / {
47         model = "Ka-Ro electronics TX6Q-1110/-1130 Module on MB7 baseboard";
48         compatible = "karo,imx6q-tx6q", "fsl,imx6q";
50         aliases {
51                 display = &lvds0;
52                 ipu1 = &ipu2;
53                 lvds0 = &lvds0;
54                 lvds1 = &lvds1;
55         };
57         backlight0: backlight0 {
58                 compatible = "pwm-backlight";
59                 pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
60                 power-supply = <&reg_lcd0_pwr>;
61                 /*
62                  * a poor man's way to create a 1:1 relationship between
63                  * the PWM value and the actual duty cycle
64                  */
65                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
66                                      10 11 12 13 14 15 16 17 18 19
67                                      20 21 22 23 24 25 26 27 28 29
68                                      30 31 32 33 34 35 36 37 38 39
69                                      40 41 42 43 44 45 46 47 48 49
70                                      50 51 52 53 54 55 56 57 58 59
71                                      60 61 62 63 64 65 66 67 68 69
72                                      70 71 72 73 74 75 76 77 78 79
73                                      80 81 82 83 84 85 86 87 88 89
74                                      90 91 92 93 94 95 96 97 98 99
75                                     100>;
76                 default-brightness-level = <50>;
77         };
79         backlight1: backlight1 {
80                 compatible = "pwm-backlight";
81                 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
82                 power-supply = <&reg_lcd1_pwr>;
83                 /*
84                  * a poor man's way to create a 1:1 relationship between
85                  * the PWM value and the actual duty cycle
86                  */
87                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
88                                      10 11 12 13 14 15 16 17 18 19
89                                      20 21 22 23 24 25 26 27 28 29
90                                      30 31 32 33 34 35 36 37 38 39
91                                      40 41 42 43 44 45 46 47 48 49
92                                      50 51 52 53 54 55 56 57 58 59
93                                      60 61 62 63 64 65 66 67 68 69
94                                      70 71 72 73 74 75 76 77 78 79
95                                      80 81 82 83 84 85 86 87 88 89
96                                      90 91 92 93 94 95 96 97 98 99
97                                     100>;
98                 default-brightness-level = <50>;
99         };
102 &can1 {
103         status = "disabled";
106 &can2 {
107         xceiver-supply = <&reg_3v3>;
110 &i2c3 {
111         polytouch1: eeti@04 {
112                 compatible = "eeti,egalax_ts";
113                 reg = <0x04>;
114                 pinctrl-names = "default";
115                 pinctrl-0 = <&pinctrl_eeti>;
116                 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>;
117                 wakeup-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
118                 wakeup-source;
119         };
122 &ipu2 {
123         status = "disabled";
126 &kpp {
127         status = "disabled"; /* pads partially clash with backlight1 PWM */
130 &ldb {
131         status = "okay";
133         lvds0: lvds-channel@0 {
134                 fsl,data-mapping = "spwg";
135                 fsl,data-width = <18>;
136                 status = "okay";
138                 display-timings {
139                         native-mode = <&lvds0_timing1>;
141                         lvds0_timing0: hsd100pxn1 {
142                                 clock-frequency = <65000000>;
143                                 hactive = <1024>;
144                                 vactive = <768>;
145                                 hback-porch = <220>;
146                                 hfront-porch = <40>;
147                                 vback-porch = <21>;
148                                 vfront-porch = <7>;
149                                 hsync-len = <60>;
150                                 vsync-len = <10>;
151                                 hsync-active = <0>;
152                                 vsync-active = <0>;
153                                 de-active = <1>;
154                                 pixelclk-active = <1>;
155                         };
157                         lvds0_timing1: VGA {
158                                 clock-frequency = <25200000>;
159                                 hactive = <640>;
160                                 vactive = <480>;
161                                 hback-porch = <48>;
162                                 hfront-porch = <16>;
163                                 vback-porch = <31>;
164                                 vfront-porch = <12>;
165                                 hsync-len = <96>;
166                                 vsync-len = <2>;
167                                 hsync-active = <0>;
168                                 vsync-active = <0>;
169                                 de-active = <1>;
170                                 pixelclk-active = <0>;
171                         };
173                         lvds0_timing2: nl12880bc20 {
174                                 clock-frequency = <71000000>;
175                                 hactive = <1280>;
176                                 vactive = <800>;
177                                 hback-porch = <50>;
178                                 hfront-porch = <50>;
179                                 vback-porch = <5>;
180                                 vfront-porch = <5>;
181                                 hsync-len = <60>;
182                                 vsync-len = <13>;
183                                 hsync-active = <0>;
184                                 vsync-active = <0>;
185                                 de-active = <1>;
186                                 pixelclk-active = <1>;
187                         };
188                 };
189         };
191         lvds1: lvds-channel@1 {
192                 fsl,data-mapping = "spwg";
193                 fsl,data-width = <18>;
194                 status = "okay";
196                 display-timings {
197                         native-mode = <&lvds1_timing2>;
199                         lvds1_timing0: hsd100pxn1 {
200                                 clock-frequency = <65000000>;
201                                 hactive = <1024>;
202                                 vactive = <768>;
203                                 hback-porch = <220>;
204                                 hfront-porch = <40>;
205                                 vback-porch = <21>;
206                                 vfront-porch = <7>;
207                                 hsync-len = <60>;
208                                 vsync-len = <10>;
209                                 hsync-active = <0>;
210                                 vsync-active = <0>;
211                                 de-active = <1>;
212                                 pixelclk-active = <1>;
213                         };
215                         lvds1_timing1: VGA {
216                                 clock-frequency = <25200000>;
217                                 hactive = <640>;
218                                 vactive = <480>;
219                                 hback-porch = <48>;
220                                 hfront-porch = <16>;
221                                 vback-porch = <31>;
222                                 vfront-porch = <12>;
223                                 hsync-len = <96>;
224                                 vsync-len = <2>;
225                                 hsync-active = <0>;
226                                 vsync-active = <0>;
227                                 de-active = <1>;
228                                 pixelclk-active = <0>;
229                         };
231                         lvds1_timing2: nl12880bc20 {
232                                 clock-frequency = <71000000>;
233                                 hactive = <1280>;
234                                 vactive = <800>;
235                                 hback-porch = <50>;
236                                 hfront-porch = <50>;
237                                 vback-porch = <5>;
238                                 vfront-porch = <5>;
239                                 hsync-len = <60>;
240                                 vsync-len = <13>;
241                                 hsync-active = <0>;
242                                 vsync-active = <0>;
243                                 de-active = <1>;
244                                 pixelclk-active = <1>;
245                         };
246                 };
247         };
250 &pwm1 {
251         status = "okay";
254 &sata {
255         status = "okay";
258 &iomuxc {
259         pinctrl_eeti: eetigrp {
260                 fsl,pins = <
261                         MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b1 /* Interrupt */
262                 >;
263         };