x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / imx6qdl-gw551x.dtsi
blob405b40310ddf2828672e8c0d7245b42ea701ae80
1 /*
2  * Copyright 2014 Gateworks Corporation
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of
12  *     the License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  *     You should have received a copy of the GNU General Public
20  *     License along with this file; if not, write to the Free
21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22  *     MA 02110-1301 USA
23  *
24  * Or, alternatively,
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use,
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
48 #include <dt-bindings/gpio/gpio.h>
50 / {
51         /* these are used by bootloader for disabling nodes */
52         aliases {
53                 led0 = &led0;
54                 nand = &gpmi;
55                 ssi0 = &ssi1;
56                 usb0 = &usbh1;
57                 usb1 = &usbotg;
58         };
60         chosen {
61                 bootargs = "console=ttymxc1,115200";
62         };
64         leds {
65                 compatible = "gpio-leds";
66                 pinctrl-names = "default";
67                 pinctrl-0 = <&pinctrl_gpio_leds>;
69                 led0: user1 {
70                         label = "user1";
71                         gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
72                         default-state = "on";
73                         linux,default-trigger = "heartbeat";
74                 };
75         };
77         memory {
78                 reg = <0x10000000 0x20000000>;
79         };
81         reg_5p0v: regulator-5p0v {
82                 compatible = "regulator-fixed";
83                 regulator-name = "5P0V";
84                 regulator-min-microvolt = <5000000>;
85                 regulator-max-microvolt = <5000000>;
86         };
88         reg_usb_h1_vbus: regulator-usb-h1-vbus {
89                 compatible = "regulator-fixed";
90                 regulator-name = "usb_h1_vbus";
91                 regulator-min-microvolt = <5000000>;
92                 regulator-max-microvolt = <5000000>;
93         };
95         reg_usb_otg_vbus: regulator-usb-otg-vbus {
96                 compatible = "regulator-fixed";
97                 regulator-name = "usb_otg_vbus";
98                 regulator-min-microvolt = <5000000>;
99                 regulator-max-microvolt = <5000000>;
100         };
103 &can1 {
104         pinctrl-names = "default";
105         pinctrl-0 = <&pinctrl_flexcan1>;
106         status = "okay";
109 &gpmi {
110         pinctrl-names = "default";
111         pinctrl-0 = <&pinctrl_gpmi_nand>;
112         status = "okay";
115 &hdmi {
116         ddc-i2c-bus = <&i2c3>;
117         status = "okay";
120 &i2c1 {
121         clock-frequency = <100000>;
122         pinctrl-names = "default";
123         pinctrl-0 = <&pinctrl_i2c1>;
124         status = "okay";
126         eeprom1: eeprom@50 {
127                 compatible = "atmel,24c02";
128                 reg = <0x50>;
129                 pagesize = <16>;
130         };
132         eeprom2: eeprom@51 {
133                 compatible = "atmel,24c02";
134                 reg = <0x51>;
135                 pagesize = <16>;
136         };
138         eeprom3: eeprom@52 {
139                 compatible = "atmel,24c02";
140                 reg = <0x52>;
141                 pagesize = <16>;
142         };
144         eeprom4: eeprom@53 {
145                 compatible = "atmel,24c02";
146                 reg = <0x53>;
147                 pagesize = <16>;
148         };
150         gpio: pca9555@23 {
151                 compatible = "nxp,pca9555";
152                 reg = <0x23>;
153                 gpio-controller;
154                 #gpio-cells = <2>;
155         };
157         rtc: ds1672@68 {
158                 compatible = "dallas,ds1672";
159                 reg = <0x68>;
160         };
163 &i2c2 {
164         clock-frequency = <100000>;
165         pinctrl-names = "default";
166         pinctrl-0 = <&pinctrl_i2c2>;
167         status = "okay";
169         ltc3676: pmic@3c {
170                 compatible = "lltc,ltc3676";
171                 reg = <0x3c>;
172                 pinctrl-names = "default";
173                 pinctrl-0 = <&pinctrl_pmic>;
174                 interrupt-parent = <&gpio1>;
175                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
177                 regulators {
178                         /* VDD_SOC (1+R1/R2 = 1.635) */
179                         reg_vdd_soc: sw1 {
180                                 regulator-name = "vddsoc";
181                                 regulator-min-microvolt = <674400>;
182                                 regulator-max-microvolt = <1308000>;
183                                 lltc,fb-voltage-divider = <127000 200000>;
184                                 regulator-ramp-delay = <7000>;
185                                 regulator-boot-on;
186                                 regulator-always-on;
187                         };
189                         /* VDD_DDR (1+R1/R2 = 2.105) */
190                         reg_vdd_ddr: sw2 {
191                                 regulator-name = "vddddr";
192                                 regulator-min-microvolt = <868310>;
193                                 regulator-max-microvolt = <1684000>;
194                                 lltc,fb-voltage-divider = <221000 200000>;
195                                 regulator-ramp-delay = <7000>;
196                                 regulator-boot-on;
197                                 regulator-always-on;
198                         };
200                         /* VDD_ARM (1+R1/R2 = 1.635) */
201                         reg_vdd_arm: sw3 {
202                                 regulator-name = "vddarm";
203                                 regulator-min-microvolt = <674400>;
204                                 regulator-max-microvolt = <1308000>;
205                                 lltc,fb-voltage-divider = <127000 200000>;
206                                 regulator-ramp-delay = <7000>;
207                                 regulator-boot-on;
208                                 regulator-always-on;
209                         };
211                         /* VDD_3P3 (1+R1/R2 = 1.281) */
212                         reg_3p3: sw4 {
213                                 regulator-name = "vdd3p3";
214                                 regulator-min-microvolt = <1880000>;
215                                 regulator-max-microvolt = <3647000>;
216                                 lltc,fb-voltage-divider = <200000 56200>;
217                                 regulator-ramp-delay = <7000>;
218                                 regulator-boot-on;
219                                 regulator-always-on;
220                         };
222                         /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
223                         reg_1p8a: ldo2 {
224                                 regulator-name = "vdd1p8a";
225                                 regulator-min-microvolt = <1816125>;
226                                 regulator-max-microvolt = <1816125>;
227                                 lltc,fb-voltage-divider = <301000 200000>;
228                                 regulator-boot-on;
229                                 regulator-always-on;
230                         };
232                         /* VDD_1P8b: HDMI In analog */
233                         reg_1p8b: ldo3 {
234                                 regulator-name = "vdd1p8b";
235                                 regulator-min-microvolt = <1800000>;
236                                 regulator-max-microvolt = <1800000>;
237                                 regulator-boot-on;
238                         };
240                         /* VDD_HIGH (1+R1/R2 = 4.17) */
241                         reg_3p0: ldo4 {
242                                 regulator-name = "vdd3p0";
243                                 regulator-min-microvolt = <3023250>;
244                                 regulator-max-microvolt = <3023250>;
245                                 lltc,fb-voltage-divider = <634000 200000>;
246                                 regulator-boot-on;
247                                 regulator-always-on;
248                         };
249                 };
250         };
253 &i2c3 {
254         clock-frequency = <100000>;
255         pinctrl-names = "default";
256         pinctrl-0 = <&pinctrl_i2c3>;
257         status = "okay";
259         gpio_exp: pca9555@24 {
260                 compatible = "nxp,pca9555";
261                 reg = <0x24>;
262                 gpio-controller;
263                 #gpio-cells = <2>;
264         };
268 &pcie {
269         pinctrl-names = "default";
270         pinctrl-0 = <&pinctrl_pcie>;
271         reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
272         status = "okay";
275 &pwm2 {
276         pinctrl-names = "default";
277         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
278         status = "disabled";
281 &pwm3 {
282         pinctrl-names = "default";
283         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
284         status = "disabled";
287 &ssi1 {
288         status = "okay";
291 &uart2 {
292         pinctrl-names = "default";
293         pinctrl-0 = <&pinctrl_uart2>;
294         status = "okay";
297 &uart3 {
298         pinctrl-names = "default";
299         pinctrl-0 = <&pinctrl_uart3>;
300         status = "okay";
303 &usbotg {
304         vbus-supply = <&reg_usb_otg_vbus>;
305         pinctrl-names = "default";
306         pinctrl-0 = <&pinctrl_usbotg>;
307         disable-over-current;
308         status = "okay";
311 &usbh1 {
312         vbus-supply = <&reg_usb_h1_vbus>;
313         status = "okay";
316 &wdog1 {
317         pinctrl-names = "default";
318         pinctrl-0 = <&pinctrl_wdog>;
319         fsl,ext-reset-output;
322 &iomuxc {
323         imx6qdl-gw51xx {
324                 pinctrl_flexcan1: flexcan1grp {
325                         fsl,pins = <
326                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
327                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
328                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x4001b0b0 /* CAN_STBY */
329                         >;
330                 };
332                 pinctrl_gpio_leds: gpioledsgrp {
333                         fsl,pins = <
334                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
335                         >;
336                 };
338                 pinctrl_gpmi_nand: gpminandgrp {
339                         fsl,pins = <
340                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
341                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
342                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
343                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
344                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
345                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
346                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
347                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
348                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
349                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
350                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
351                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
352                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
353                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
354                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
355                         >;
356                 };
358                 pinctrl_i2c1: i2c1grp {
359                         fsl,pins = <
360                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
361                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
362                         >;
363                 };
365                 pinctrl_i2c2: i2c2grp {
366                         fsl,pins = <
367                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
368                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
369                         >;
370                 };
372                 pinctrl_i2c3: i2c3grp {
373                         fsl,pins = <
374                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
375                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
376                         >;
377                 };
379                 pinctrl_pcie: pciegrp {
380                         fsl,pins = <
381                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00           0x1b0b0 /* PCIE RST */
382                         >;
383                 };
385                 pinctrl_pmic: pmicgrp {
386                         fsl,pins = <
387                                 MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
388                         >;
389                 };
391                 pinctrl_pwm2: pwm2grp {
392                         fsl,pins = <
393                                 MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
394                         >;
395                 };
397                 pinctrl_pwm3: pwm3grp {
398                         fsl,pins = <
399                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
400                         >;
401                 };
403                 pinctrl_uart2: uart2grp {
404                         fsl,pins = <
405                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
406                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
407                         >;
408                 };
410                 pinctrl_uart3: uart3grp {
411                         fsl,pins = <
412                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
413                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
414                         >;
415                 };
417                 pinctrl_usbotg: usbotggrp {
418                         fsl,pins = <
419                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
420                         >;
421                 };
423                 pinctrl_wdog: wdoggrp {
424                         fsl,pins = <
425                                 MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
426                         >;
427                 };
428         };