x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / omap3-pandora-1ghz.dts
blob25498f756a29e642969a07c7fd1a81f65549ebf1
1 /*
2  * Copyright (C) 2015
3  *   Nikolaus Schaller <hns@goldelico.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
11  * device tree for OpenPandora 1GHz with DM3730
12  */
14 /dts-v1/;
16 #include "omap36xx.dtsi"
17 #include "omap3-pandora-common.dtsi"
19 / {
20         model = "Pandora Handheld Console 1GHz";
22         compatible = "openpandora,omap3-pandora-1ghz", "ti,omap36xx", "ti,omap3";
25 &omap3_pmx_core2 {
27         pinctrl-names = "default";
28         pinctrl-0 = <
29                 &hsusb2_2_pins
30                 &control_pins
31         >;
33         hsusb2_2_pins: pinmux_hsusb2_2_pins {
34                 pinctrl-single,pins = <
35                         OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
36                         OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
37                         OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
38                         OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
39                         OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
40                         OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
41                 >;
42         };
44         mmc3_pins: pinmux_mmc3_pins {
45                 pinctrl-single,pins = <
46                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)      /* etk_clk.sdmmc3_clk */
47                         OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)      /* etk_ctl.sdmmc3_cmd */
48                         OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2)      /* etk_d3.sdmmc3_dat3 */
49                         OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2)      /* etk_d4.sdmmc3_dat0 */
50                         OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2)      /* etk_d5.sdmmc3_dat1 */
51                         OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2)      /* etk_d6.sdmmc3_dat2 */
52                 >;
53         };
55         control_pins: pinmux_control_pins {
56                 pinctrl-single,pins = <
57                         OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE4)    /* etk_d0.gpio_14 =  HP_SHUTDOWN */
58                         OMAP3630_CORE2_IOPAD(0x25de, PIN_OUTPUT | MUX_MODE4)            /* etk_d1.gpio_15 =  BT_SHUTDOWN */
59                         OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)            /* etk_d2.gpio_16 =  RESET_USB_HOST */
60                         OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE4)             /* etk_d7.gpio_21 =  WIFI IRQ */
61                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)            /* etk_d8.gpio_22 =  MSECURE */
62                         OMAP3630_CORE2_IOPAD(0x25ee, PIN_OUTPUT | MUX_MODE4)            /* etk_d9.gpio_23 =  WIFI_POWER */
63                         OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT | MUX_MODE4)                 /* reserved.gpio_127 = MMC2_WP */
64                         OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)                 /* reserved.gpio_126 = MMC1_WP */
65                         OMAP3_WKUP_IOPAD(0x2a58, PIN_OUTPUT | MUX_MODE4)                /* reserved.gpio_128 = LED_MMC1 */
66                         OMAP3_WKUP_IOPAD(0x2a5a, PIN_OUTPUT | MUX_MODE4)                /* reserved.gpio_129 = LED_MMC2 */
68                 >;
69         };