2 * Reference Device Tree Source for the Bock-W board
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
9 * Copyright (C) 2013 Renesas Solutions Corp.
10 * Copyright (C) 2013 Simon Horman
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
18 #include "r8a7778.dtsi"
19 #include <dt-bindings/interrupt-controller/irq.h>
20 #include <dt-bindings/gpio/gpio.h>
24 compatible = "renesas,bockw", "renesas,r8a7778";
31 bootargs = "ignore_loglevel ip=dhcp root=/dev/nfs rw";
32 stdout-path = "serial0:115200n8";
36 device_type = "memory";
37 reg = <0x60000000 0x10000000>;
40 fixedregulator3v3: regulator-3v3 {
41 compatible = "regulator-fixed";
42 regulator-name = "fixed-3.3V";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
50 compatible = "simple-audio-card";
52 simple-audio-card,format = "left_j";
53 simple-audio-card,bitclock-master = <&sndcodec>;
54 simple-audio-card,frame-master = <&sndcodec>;
56 sndcpu: simple-audio-card,cpu {
57 sound-dai = <&rcar_sound>;
60 sndcodec: simple-audio-card,codec {
61 sound-dai = <&ak4643>;
62 system-clock-frequency = <11289600>;
69 compatible = "smsc,lan9220", "smsc,lan9115";
70 reg = <0x18300000 0x1000>;
73 interrupt-parent = <&irqpin>;
74 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
76 vddvario-supply = <&fixedregulator3v3>;
77 vdd33a-supply = <&fixedregulator3v3>;
82 clock-frequency = <33333333>;
89 compatible = "asahi-kasei,ak4643";
90 #sound-dai-cells = <0>;
95 compatible = "oki,ml86v7667";
100 compatible = "oki,ml86v7667";
105 compatible = "epson,rx8581";
111 pinctrl-0 = <&mmc_pins>;
112 pinctrl-names = "default";
114 vmmc-supply = <&fixedregulator3v3>;
129 pinctrl-0 = <&scif_clk_pins>;
130 pinctrl-names = "default";
133 groups = "scif0_data_a", "scif0_ctrl";
137 scif_clk_pins: scif_clk {
139 function = "scif_clk";
143 groups = "mmc_data8", "mmc_ctrl";
148 groups = "sdhi0_data4", "sdhi0_ctrl";
151 sdhi0_pup_pins: sd0_pup {
152 groups = "sdhi0_cd", "sdhi0_wp";
173 groups = "vin0_data8", "vin0_clk";
178 groups = "vin1_data8", "vin1_clk";
185 #sound-dai-cells = <0>;
189 pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>;
190 pinctrl-names = "default";
192 vmmc-supply = <&fixedregulator3v3>;
195 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
199 pinctrl-0 = <&hspi0_pins>;
200 pinctrl-names = "default";
204 compatible = "spansion,s25fl008k", "jedec,spi-nor";
206 spi-max-frequency = <104000000>;
210 compatible = "fixed-partitions";
211 #address-cells = <1>;
216 reg = <0x00000000 0x00100000>;
223 pinctrl-0 = <&scif0_pins>;
224 pinctrl-names = "default";
231 clock-frequency = <14745600>;