arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts

   1 /*
   2  *  Copyright (C) 2015 Marek Vasut <marex@denx.de>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include "socfpga_cyclone5.dtsi"
  49 #include <dt-bindings/gpio/gpio.h>
  50 #include <dt-bindings/input/input.h>
  51
  52 / {
  53         model = "samtec VIN|ING FPGA";
  54         compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
  55
  56         chosen {
  57                 bootargs = "console=ttyS0,115200";
  58         };
  59
  60         memory {
  61                 name = "memory";
  62                 device_type = "memory";
  63                 reg = <0x0 0x40000000>; /* 1GB */
  64         };
  65
  66         aliases {
  67                 /*
  68                  * This allow the ethaddr uboot environment variable contents
  69                  * to be added to the gmac1 device tree blob.
  70                  */
  71                 ethernet0 = &gmac1;
  72         };
  73
  74         leds {
  75                 compatible = "gpio-leds";
  76
  77                 hps_led0 {
  78                         label = "hps:green:led0";       /* ALIVE_LED_GR */
  79                         gpios = <&portb 19 0>;  /* HPS_GPIO48 */
  80                         linux,default-trigger = "heartbeat";
  81                 };
  82
  83                 hps_led1 {
  84                         label = "hps:red:led0";         /* ALIVE_LED_RD */
  85                         gpios = <&portb 24 0>;  /* HPS_GPIO53 */
  86                         linux,default-trigger = "none";
  87                 };
  88
  89                 hps_led2 {
  90                         label = "hps:green:led1";       /* LINK2HOST_LED_GR */
  91                         gpios = <&portb 25 0>;  /* HPS_GPIO54 */
  92                         linux,default-trigger = "heartbeat";
  93                 };
  94
  95                 hps_led3 {
  96                         label = "hps:red:led1";         /* LINK2HOST_LED_RD */
  97                         gpios = <&portc 7 0>;   /* HPS_GPIO65 */
  98                         linux,default-trigger = "none";
  99                 };
 100         };
 101
 102         gpio-keys {
 103                 compatible = "gpio-keys";
 104
 105                 hps_temp0 {
 106                         label = "BTN_0";                        /* TEMP_OS */
 107                         gpios = <&portc 18 GPIO_ACTIVE_LOW>;    /* HPS_GPIO60 */
 108                         linux,code = <BTN_0>;
 109                 };
 110
 111                 hps_hkey0 {
 112                         label = "BTN_1";                        /* DIS_PWR */
 113                         gpios = <&portc 19 GPIO_ACTIVE_LOW>;    /* HPS_GPIO61 */
 114                         linux,code = <BTN_1>;
 115                 };
 116
 117                 hps_hkey1 {
 118                         label = "hps_hkey1";                    /* POWER_DOWN */
 119                         gpios = <&portc 20 GPIO_ACTIVE_LOW>;    /* HPS_GPIO62 */
 120                         linux,code = <KEY_POWER>;
 121                 };
 122         };
 123
 124         regulator-usb-nrst {
 125                 compatible = "regulator-fixed";
 126                 regulator-name = "usb_nrst";
 127                 regulator-min-microvolt = <5000000>;
 128                 regulator-max-microvolt = <5000000>;
 129                 gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
 130                 startup-delay-us = <70000>;
 131                 enable-active-high;
 132                 regulator-always-on;
 133         };
 134 };
 135
 136 &gmac1 {
 137         status = "okay";
 138         phy-mode = "rgmii";
 139         phy-handle = <&phy1>;
 140
 141         snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
 142         snps,reset-active-low;
 143         snps,reset-delays-us = <10000 10000 10000>;
 144
 145         mdio0 {
 146                 #address-cells = <1>;
 147                 #size-cells = <0>;
 148                 compatible = "snps,dwmac-mdio";
 149                 phy1: ethernet-phy@1 {
 150                         reg = <1>;
 151                         rxd0-skew-ps = <0>;
 152                         rxd1-skew-ps = <0>;
 153                         rxd2-skew-ps = <0>;
 154                         rxd3-skew-ps = <0>;
 155                         txen-skew-ps = <0>;
 156                         txc-skew-ps = <2600>;
 157                         rxdv-skew-ps = <0>;
 158                         rxc-skew-ps = <2000>;
 159                 };
 160         };
 161 };
 162
 163 &gpio0 {        /* GPIO 0..29 */
 164         status = "okay";
 165 };
 166
 167 &gpio1 {        /* GPIO 30..57 */
 168         status = "okay";
 169 };
 170
 171 &gpio2 {        /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
 172         status = "okay";
 173 };
 174
 175 &i2c0 {
 176         status = "okay";
 177
 178         gpio: pca9557@1f {
 179                 compatible = "nxp,pca9557";
 180                 reg = <0x1f>;
 181                 gpio-controller;
 182                 #gpio-cells = <2>;
 183         };
 184
 185         temp: lm75@48 {
 186                 compatible = "lm75";
 187                 reg = <0x48>;
 188         };
 189
 190         at24@50 {
 191                 compatible = "at24,24c01";
 192                 pagesize = <8>;
 193                 reg = <0x50>;
 194         };
 195
 196         i2cswitch@70 {
 197                 compatible = "nxp,pca9548";
 198                 #address-cells = <1>;
 199                 #size-cells = <0>;
 200                 reg = <0x70>;
 201
 202                 i2c@0 {
 203                         #address-cells = <1>;
 204                         #size-cells = <0>;
 205                         reg = <0>;
 206                         eeprom@51 {
 207                                 compatible = "at,24c01";
 208                                 pagesize = <8>;
 209                                 reg = <0x51>;
 210                         };
 211                 };
 212
 213                 i2c@1 {
 214                         #address-cells = <1>;
 215                         #size-cells = <0>;
 216                         reg = <1>;
 217                         eeprom@51 {
 218                                 compatible = "at,24c01";
 219                                 pagesize = <8>;
 220                                 reg = <0x51>;
 221                         };
 222                 };
 223
 224                 i2c@2 {
 225                         #address-cells = <1>;
 226                         #size-cells = <0>;
 227                         reg = <2>;
 228                         eeprom@51 {
 229                                 compatible = "at,24c01";
 230                                 pagesize = <8>;
 231                                 reg = <0x51>;
 232                         };
 233                 };
 234
 235                 i2c@3 {
 236                         #address-cells = <1>;
 237                         #size-cells = <0>;
 238                         reg = <3>;
 239                         eeprom@51 {
 240                                 compatible = "at,24c01";
 241                                 pagesize = <8>;
 242                                 reg = <0x51>;
 243                         };
 244                 };
 245
 246                 i2c@4 {
 247                         #address-cells = <1>;
 248                         #size-cells = <0>;
 249                         reg = <4>;
 250                         eeprom@51 {
 251                                 compatible = "at,24c01";
 252                                 pagesize = <8>;
 253                                 reg = <0x51>;
 254                         };
 255                 };
 256
 257                 i2c@5 {
 258                         #address-cells = <1>;
 259                         #size-cells = <0>;
 260                         reg = <5>;
 261                         eeprom@51 {
 262                                 compatible = "at,24c01";
 263                                 pagesize = <8>;
 264                                 reg = <0x51>;
 265                         };
 266                 };
 267
 268                 i2c@6 {
 269                         #address-cells = <1>;
 270                         #size-cells = <0>;
 271                         reg = <6>;
 272                         eeprom@51 {
 273                                 compatible = "at,24c01";
 274                                 pagesize = <8>;
 275                                 reg = <0x51>;
 276                         };
 277                 };
 278
 279                 i2c@7 {
 280                         #address-cells = <1>;
 281                         #size-cells = <0>;
 282                         reg = <7>;
 283                         eeprom@51 {
 284                                 compatible = "at,24c01";
 285                                 pagesize = <8>;
 286                                 reg = <0x51>;
 287                         };
 288                 };
 289         };
 290 };
 291
 292 &i2c1 {
 293         status = "okay";
 294         clock-frequency = <100000>;
 295
 296         at24@50 {
 297                 compatible = "at24,24c02";
 298                 pagesize = <8>;
 299                 reg = <0x50>;
 300         };
 301 };
 302
 303 &usb0 {
 304         dr_mode = "host";
 305         status = "okay";
 306 };
 307
 308 &usb1 {
 309         dr_mode = "peripheral";
 310         status = "okay";
 311 };