x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / socfpga_vt.dts
blobf9345e02ca49e069b846563dc474432b77377b45
1 /*
2  *  Copyright (C) 2013 Altera Corporation <www.altera.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
18 /dts-v1/;
19 #include "socfpga.dtsi"
21 / {
22         model = "Altera SOCFPGA VT";
23         compatible = "altr,socfpga-vt", "altr,socfpga";
25         chosen {
26                 bootargs = "console=ttyS0,57600";
27         };
29         memory {
30                 name = "memory";
31                 device_type = "memory";
32                 reg = <0x0 0x40000000>; /* 1 GB */
33         };
35         soc {
36                 clkmgr@ffd04000 {
37                         clocks {
38                                 osc1 {
39                                         clock-frequency = <10000000>;
40                                 };
41                         };
42                 };
44                 dwmmc0@ff704000 {
45                         num-slots = <1>;
46                         broken-cd;
47                         bus-width = <4>;
48                         cap-mmc-highspeed;
49                         cap-sd-highspeed;
50                 };
52                 ethernet@ff700000 {
53                         phy-mode = "gmii";
54                         status = "okay";
55                 };
57                 timer0@ffc08000 {
58                         clock-frequency = <7000000>;
59                 };
61                 timer1@ffc09000 {
62                         clock-frequency = <7000000>;
63                 };
65                 timer2@ffd00000 {
66                         clock-frequency = <7000000>;
67                 };
69                 timer3@ffd01000 {
70                         clock-frequency = <7000000>;
71                 };
73                 serial0@ffc02000 {
74                         clock-frequency = <7372800>;
75                 };
77                 serial1@ffc03000 {
78                         clock-frequency = <7372800>;
79                 };
81                 sysmgr@ffd08000 {
82                         cpu1-start-addr = <0xffd08010>;
83                 };
84         };
87 &gmac0 {
88         status = "okay";
89         phy-mode = "gmii";