x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / boot / dts / tegra20-whistler.dts
blob1e06f854c8b4146970eb6b2c3ff8a7ae398fdb91
1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
6 / {
7         model = "NVIDIA Tegra20 Whistler evaluation board";
8         compatible = "nvidia,whistler", "nvidia,tegra20";
10         aliases {
11                 rtc0 = "/i2c@7000d000/max8907@3c";
12                 rtc1 = "/rtc@7000e000";
13                 serial0 = &uarta;
14         };
16         chosen {
17                 stdout-path = "serial0:115200n8";
18         };
20         memory {
21                 reg = <0x00000000 0x20000000>;
22         };
24         host1x@50000000 {
25                 hdmi@54280000 {
26                         status = "okay";
28                         vdd-supply = <&hdmi_vdd_reg>;
29                         pll-supply = <&hdmi_pll_reg>;
31                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
32                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
33                                 GPIO_ACTIVE_HIGH>;
34                 };
35         };
37         pinmux@70000014 {
38                 pinctrl-names = "default";
39                 pinctrl-0 = <&state_default>;
41                 state_default: pinmux {
42                         ata {
43                                 nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
44                                         "gmc", "gmd", "gpu";
45                                 nvidia,function = "gmi";
46                         };
47                         atc {
48                                 nvidia,pins = "atc", "atd";
49                                 nvidia,function = "sdio4";
50                         };
51                         cdev1 {
52                                 nvidia,pins = "cdev1";
53                                 nvidia,function = "plla_out";
54                         };
55                         cdev2 {
56                                 nvidia,pins = "cdev2";
57                                 nvidia,function = "osc";
58                         };
59                         crtp {
60                                 nvidia,pins = "crtp";
61                                 nvidia,function = "crt";
62                         };
63                         csus {
64                                 nvidia,pins = "csus";
65                                 nvidia,function = "vi_sensor_clk";
66                         };
67                         dap1 {
68                                 nvidia,pins = "dap1";
69                                 nvidia,function = "dap1";
70                         };
71                         dap2 {
72                                 nvidia,pins = "dap2";
73                                 nvidia,function = "dap2";
74                         };
75                         dap3 {
76                                 nvidia,pins = "dap3";
77                                 nvidia,function = "dap3";
78                         };
79                         dap4 {
80                                 nvidia,pins = "dap4";
81                                 nvidia,function = "dap4";
82                         };
83                         ddc {
84                                 nvidia,pins = "ddc";
85                                 nvidia,function = "i2c2";
86                         };
87                         dta {
88                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
89                                 nvidia,function = "vi";
90                         };
91                         dte {
92                                 nvidia,pins = "dte";
93                                 nvidia,function = "rsvd1";
94                         };
95                         dtf {
96                                 nvidia,pins = "dtf";
97                                 nvidia,function = "i2c3";
98                         };
99                         gme {
100                                 nvidia,pins = "gme";
101                                 nvidia,function = "dap5";
102                         };
103                         gpu7 {
104                                 nvidia,pins = "gpu7";
105                                 nvidia,function = "rtck";
106                         };
107                         gpv {
108                                 nvidia,pins = "gpv";
109                                 nvidia,function = "pcie";
110                         };
111                         hdint {
112                                 nvidia,pins = "hdint", "pta";
113                                 nvidia,function = "hdmi";
114                         };
115                         i2cp {
116                                 nvidia,pins = "i2cp";
117                                 nvidia,function = "i2cp";
118                         };
119                         irrx {
120                                 nvidia,pins = "irrx", "irtx";
121                                 nvidia,function = "uartb";
122                         };
123                         kbca {
124                                 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
125                                 nvidia,function = "kbc";
126                         };
127                         kbcb {
128                                 nvidia,pins = "kbcb", "kbcd";
129                                 nvidia,function = "sdio2";
130                         };
131                         lcsn {
132                                 nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
133                                         "spia", "spib", "spic";
134                                 nvidia,function = "spi3";
135                         };
136                         ld0 {
137                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
138                                         "ld5", "ld6", "ld7", "ld8", "ld9",
139                                         "ld10", "ld11", "ld12", "ld13", "ld14",
140                                         "ld15", "ld16", "ld17", "ldc", "ldi",
141                                         "lhp0", "lhp1", "lhp2", "lhs", "lm0",
142                                         "lm1", "lpp", "lpw0", "lpw1", "lpw2",
143                                         "lsc0", "lsc1", "lspi", "lvp0", "lvp1",
144                                         "lvs";
145                                 nvidia,function = "displaya";
146                         };
147                         owc {
148                                 nvidia,pins = "owc", "uac";
149                                 nvidia,function = "owr";
150                         };
151                         pmc {
152                                 nvidia,pins = "pmc";
153                                 nvidia,function = "pwr_on";
154                         };
155                         rm {
156                                 nvidia,pins = "rm";
157                                 nvidia,function = "i2c1";
158                         };
159                         sdb {
160                                 nvidia,pins = "sdb", "sdc", "sdd", "slxa",
161                                         "slxc", "slxd", "slxk";
162                                 nvidia,function = "sdio3";
163                         };
164                         sdio1 {
165                                 nvidia,pins = "sdio1";
166                                 nvidia,function = "sdio1";
167                         };
168                         spdi {
169                                 nvidia,pins = "spdi", "spdo";
170                                 nvidia,function = "rsvd2";
171                         };
172                         spid {
173                                 nvidia,pins = "spid", "spie", "spig", "spih";
174                                 nvidia,function = "spi2_alt";
175                         };
176                         spif {
177                                 nvidia,pins = "spif";
178                                 nvidia,function = "spi2";
179                         };
180                         uaa {
181                                 nvidia,pins = "uaa", "uab";
182                                 nvidia,function = "uarta";
183                         };
184                         uad {
185                                 nvidia,pins = "uad";
186                                 nvidia,function = "irda";
187                         };
188                         uca {
189                                 nvidia,pins = "uca", "ucb";
190                                 nvidia,function = "uartc";
191                         };
192                         uda {
193                                 nvidia,pins = "uda";
194                                 nvidia,function = "spi1";
195                         };
196                         conf_ata {
197                                 nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
198                                         "gmb", "gmc", "gmd", "irrx", "irtx",
199                                         "kbca", "kbcb", "kbcc", "kbcd", "kbce",
200                                         "kbcf", "sdc", "sdd", "spie", "spig",
201                                         "spih", "uaa", "uab", "uad", "uca",
202                                         "ucb";
203                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
205                         };
206                         conf_atd {
207                                 nvidia,pins = "atd", "ate", "cdev1", "csus",
208                                         "dap1", "dap2", "dap3", "dap4", "dte",
209                                         "dtf", "gpu", "gpu7", "gpv", "i2cp",
210                                         "rm", "sdio1", "slxa", "slxc", "slxd",
211                                         "slxk", "spdi", "spdo", "uac", "uda";
212                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
214                         };
215                         conf_cdev2 {
216                                 nvidia,pins = "cdev2", "spia", "spib";
217                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
218                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
219                         };
220                         conf_ck32 {
221                                 nvidia,pins = "ck32", "ddrc", "lc", "pmca",
222                                         "pmcb", "pmcc", "pmcd", "xm2c",
223                                         "xm2d";
224                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
225                         };
226                         conf_crtp {
227                                 nvidia,pins = "crtp";
228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
230                         };
231                         conf_dta {
232                                 nvidia,pins = "dta", "dtb", "dtc", "dtd",
233                                         "spid", "spif";
234                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
235                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
236                         };
237                         conf_gme {
238                                 nvidia,pins = "gme", "owc", "pta", "spic";
239                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
240                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
241                         };
242                         conf_ld17_0 {
243                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
244                                         "ld23_22";
245                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
246                         };
247                         conf_ls {
248                                 nvidia,pins = "ls", "pmce";
249                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
250                         };
251                         drive_dap1 {
252                                 nvidia,pins = "drive_dap1";
253                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
254                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
255                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_8>;
256                                 nvidia,pull-down-strength = <0>;
257                                 nvidia,pull-up-strength = <0>;
258                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
259                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
260                         };
261                 };
262         };
264         i2s@70002800 {
265                 status = "okay";
266         };
268         serial@70006000 {
269                 status = "okay";
270         };
272         hdmi_ddc: i2c@7000c400 {
273                 status = "okay";
274                 clock-frequency = <100000>;
275         };
277         i2c@7000d000 {
278                 status = "okay";
279                 clock-frequency = <100000>;
281                 codec: codec@1a {
282                         compatible = "wlf,wm8753";
283                         reg = <0x1a>;
284                 };
286                 tca6416: gpio@20 {
287                         compatible = "ti,tca6416";
288                         reg = <0x20>;
289                         gpio-controller;
290                         #gpio-cells = <2>;
291                 };
293                 max8907@3c {
294                         compatible = "maxim,max8907";
295                         reg = <0x3c>;
296                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
298                         maxim,system-power-controller;
300                         mbatt-supply = <&usb0_vbus_reg>;
301                         in-v1-supply = <&mbatt_reg>;
302                         in-v2-supply = <&mbatt_reg>;
303                         in-v3-supply = <&mbatt_reg>;
304                         in1-supply = <&mbatt_reg>;
305                         in2-supply = <&nvvdd_sv3_reg>;
306                         in3-supply = <&mbatt_reg>;
307                         in4-supply = <&mbatt_reg>;
308                         in5-supply = <&mbatt_reg>;
309                         in6-supply = <&mbatt_reg>;
310                         in7-supply = <&mbatt_reg>;
311                         in8-supply = <&mbatt_reg>;
312                         in9-supply = <&mbatt_reg>;
313                         in10-supply = <&mbatt_reg>;
314                         in11-supply = <&mbatt_reg>;
315                         in12-supply = <&mbatt_reg>;
316                         in13-supply = <&mbatt_reg>;
317                         in14-supply = <&mbatt_reg>;
318                         in15-supply = <&mbatt_reg>;
319                         in16-supply = <&mbatt_reg>;
320                         in17-supply = <&nvvdd_sv3_reg>;
321                         in18-supply = <&nvvdd_sv3_reg>;
322                         in19-supply = <&mbatt_reg>;
323                         in20-supply = <&mbatt_reg>;
325                         regulators {
326                                 mbatt_reg: mbatt {
327                                         regulator-name = "vbat_pmu";
328                                         regulator-always-on;
329                                 };
331                                 sd1 {
332                                         regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
333                                         regulator-min-microvolt = <1000000>;
334                                         regulator-max-microvolt = <1000000>;
335                                         regulator-always-on;
336                                 };
338                                 sd2 {
339                                         regulator-name = "nvvdd_sv2,vdd_core";
340                                         regulator-min-microvolt = <1200000>;
341                                         regulator-max-microvolt = <1200000>;
342                                         regulator-always-on;
343                                 };
345                                 nvvdd_sv3_reg: sd3 {
346                                         regulator-name = "nvvdd_sv3";
347                                         regulator-min-microvolt = <1800000>;
348                                         regulator-max-microvolt = <1800000>;
349                                         regulator-always-on;
350                                 };
352                                 ldo1 {
353                                         regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
354                                         regulator-min-microvolt = <3300000>;
355                                         regulator-max-microvolt = <3300000>;
356                                         regulator-always-on;
357                                 };
359                                 ldo2 {
360                                         regulator-name = "nvvdd_ldo2,avdd_pll*";
361                                         regulator-min-microvolt = <1100000>;
362                                         regulator-max-microvolt = <1100000>;
363                                         regulator-always-on;
364                                 };
366                                 ldo3 {
367                                         regulator-name = "nvvdd_ldo3,vcom_1v8b";
368                                         regulator-min-microvolt = <1800000>;
369                                         regulator-max-microvolt = <1800000>;
370                                         regulator-always-on;
371                                 };
373                                 ldo4 {
374                                         regulator-name = "nvvdd_ldo4,avdd_usb*";
375                                         regulator-min-microvolt = <3300000>;
376                                         regulator-max-microvolt = <3300000>;
377                                         regulator-always-on;
378                                 };
380                                 ldo5 {
381                                         regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
382                                         regulator-min-microvolt = <2800000>;
383                                         regulator-max-microvolt = <2800000>;
384                                         regulator-always-on;
385                                 };
387                                 hdmi_pll_reg: ldo6 {
388                                         regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
389                                         regulator-min-microvolt = <1800000>;
390                                         regulator-max-microvolt = <1800000>;
391                                 };
393                                 ldo7 {
394                                         regulator-name = "nvvdd_ldo7,avddio_audio";
395                                         regulator-min-microvolt = <2800000>;
396                                         regulator-max-microvolt = <2800000>;
397                                         regulator-always-on;
398                                 };
400                                 ldo8 {
401                                         regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
402                                         regulator-min-microvolt = <3000000>;
403                                         regulator-max-microvolt = <3000000>;
404                                 };
406                                 ldo9 {
407                                         regulator-name = "nvvdd_ldo9,avdd_cam*";
408                                         regulator-min-microvolt = <2800000>;
409                                         regulator-max-microvolt = <2800000>;
410                                 };
412                                 ldo10 {
413                                         regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
414                                         regulator-min-microvolt = <3000000>;
415                                         regulator-max-microvolt = <3000000>;
416                                         regulator-always-on;
417                                 };
419                                 hdmi_vdd_reg: ldo11 {
420                                         regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
421                                         regulator-min-microvolt = <3300000>;
422                                         regulator-max-microvolt = <3300000>;
423                                 };
425                                 ldo12 {
426                                         regulator-name = "nvvdd_ldo12,vddio_sdio";
427                                         regulator-min-microvolt = <2800000>;
428                                         regulator-max-microvolt = <2800000>;
429                                         regulator-always-on;
430                                 };
432                                 ldo13 {
433                                         regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
434                                         regulator-min-microvolt = <2800000>;
435                                         regulator-max-microvolt = <2800000>;
436                                 };
438                                 ldo14 {
439                                         regulator-name = "nvvdd_ldo14,avdd_vdac";
440                                         regulator-min-microvolt = <2800000>;
441                                         regulator-max-microvolt = <2800000>;
442                                 };
444                                 ldo15 {
445                                         regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
446                                         regulator-min-microvolt = <3300000>;
447                                         regulator-max-microvolt = <3300000>;
448                                 };
450                                 ldo16 {
451                                         regulator-name = "nvvdd_ldo16,vdd_dbrtr";
452                                         regulator-min-microvolt = <1300000>;
453                                         regulator-max-microvolt = <1300000>;
454                                 };
456                                 ldo17 {
457                                         regulator-name = "nvvdd_ldo17,vddio_mipi";
458                                         regulator-min-microvolt = <1200000>;
459                                         regulator-max-microvolt = <1200000>;
460                                 };
462                                 ldo18 {
463                                         regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
464                                         regulator-min-microvolt = <1800000>;
465                                         regulator-max-microvolt = <1800000>;
466                                 };
468                                 ldo19 {
469                                         regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
470                                         regulator-min-microvolt = <2800000>;
471                                         regulator-max-microvolt = <2800000>;
472                                 };
474                                 ldo20 {
475                                         regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
476                                         regulator-min-microvolt = <1200000>;
477                                         regulator-max-microvolt = <1200000>;
478                                         regulator-always-on;
479                                 };
481                                 out5v {
482                                         regulator-name = "usb0_vbus_reg";
483                                 };
485                                 out33v {
486                                         regulator-name = "pmu_out3v3";
487                                 };
489                                 bbat {
490                                         regulator-name = "pmu_bbat";
491                                         regulator-min-microvolt = <2400000>;
492                                         regulator-max-microvolt = <2400000>;
493                                         regulator-always-on;
494                                 };
496                                 sdby {
497                                         regulator-name = "vdd_aon";
498                                         regulator-always-on;
499                                 };
501                                 vrtc {
502                                         regulator-name = "vrtc,pmu_vccadc";
503                                         regulator-always-on;
504                                 };
505                         };
506                 };
507         };
509         kbc@7000e200 {
510                 status = "okay";
511                 nvidia,debounce-delay-ms = <20>;
512                 nvidia,repeat-delay-ms = <160>;
513                 nvidia,kbc-row-pins = <0 1 2>;
514                 nvidia,kbc-col-pins = <16 17>;
515                 wakeup-source;
516                 linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_POWER)
517                                 MATRIX_KEY(0x01, 0x00, KEY_HOME)
518                                 MATRIX_KEY(0x01, 0x01, KEY_BACK)
519                                 MATRIX_KEY(0x02, 0x01, KEY_MENU)>;
520         };
522         pmc@7000e400 {
523                 nvidia,invert-interrupt;
524                 nvidia,suspend-mode = <1>;
525                 nvidia,cpu-pwr-good-time = <2000>;
526                 nvidia,cpu-pwr-off-time = <1000>;
527                 nvidia,core-pwr-good-time = <0 3845>;
528                 nvidia,core-pwr-off-time = <93727>;
529                 nvidia,core-power-req-active-high;
530                 nvidia,sys-clock-req-active-high;
531                 nvidia,combined-power-req;
532         };
534         usb@c5000000 {
535                 status = "okay";
536         };
538         usb-phy@c5000000 {
539                 status = "okay";
540                 vbus-supply = <&vbus1_reg>;
541         };
543         usb@c5008000 {
544                 status = "okay";
545         };
547         usb-phy@c5008000 {
548                 status = "okay";
549                 vbus-supply = <&vbus3_reg>;
550         };
552         sdhci@c8000400 {
553                 status = "okay";
554                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
555                 wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
556                 bus-width = <8>;
557         };
559         sdhci@c8000600 {
560                 status = "okay";
561                 bus-width = <8>;
562                 non-removable;
563         };
565         clocks {
566                 compatible = "simple-bus";
567                 #address-cells = <1>;
568                 #size-cells = <0>;
570                 clk32k_in: clock@0 {
571                         compatible = "fixed-clock";
572                         reg = <0>;
573                         #clock-cells = <0>;
574                         clock-frequency = <32768>;
575                 };
576         };
578         regulators {
579                 compatible = "simple-bus";
580                 #address-cells = <1>;
581                 #size-cells = <0>;
583                 usb0_vbus_reg: regulator@0 {
584                         compatible = "regulator-fixed";
585                         reg = <0>;
586                         regulator-name = "usb0_vbus";
587                         regulator-min-microvolt = <5000000>;
588                         regulator-max-microvolt = <5000000>;
589                         regulator-always-on;
590                 };
592                 vbus1_reg: regulator@2 {
593                         compatible = "regulator-fixed";
594                         reg = <2>;
595                         regulator-name = "vbus1";
596                         regulator-min-microvolt = <5000000>;
597                         regulator-max-microvolt = <5000000>;
598                         enable-active-high;
599                         gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
600                         regulator-always-on;
601                         regulator-boot-on;
602                 };
604                 vbus3_reg: regulator@3 {
605                         compatible = "regulator-fixed";
606                         reg = <3>;
607                         regulator-name = "vbus3";
608                         regulator-min-microvolt = <5000000>;
609                         regulator-max-microvolt = <5000000>;
610                         enable-active-high;
611                         gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
612                         regulator-always-on;
613                         regulator-boot-on;
614                 };
615         };
617         sound {
618                 compatible = "nvidia,tegra-audio-wm8753-whistler",
619                              "nvidia,tegra-audio-wm8753";
620                 nvidia,model = "NVIDIA Tegra Whistler";
622                 nvidia,audio-routing =
623                         "Headphone Jack", "LOUT1",
624                         "Headphone Jack", "ROUT1",
625                         "MIC2", "Mic Jack",
626                         "MIC2N", "Mic Jack";
628                 nvidia,i2s-controller = <&tegra_i2s1>;
629                 nvidia,audio-codec = <&codec>;
631                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
632                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
633                          <&tegra_car TEGRA20_CLK_CDEV1>;
634                 clock-names = "pll_a", "pll_a_out0", "mclk";
635         };