x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm64 / kernel / alternative.c
blob06d650f61da716a8e318a802b7af41ab9087bfaa
1 /*
2 * alternative runtime patching
3 * inspired by the x86 version
5 * Copyright (C) 2014 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #define pr_fmt(fmt) "alternatives: " fmt
22 #include <linux/init.h>
23 #include <linux/cpu.h>
24 #include <asm/cacheflush.h>
25 #include <asm/alternative.h>
26 #include <asm/cpufeature.h>
27 #include <asm/insn.h>
28 #include <asm/sections.h>
29 #include <linux/stop_machine.h>
31 #define __ALT_PTR(a,f) (u32 *)((void *)&(a)->f + (a)->f)
32 #define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset)
33 #define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset)
35 struct alt_region {
36 struct alt_instr *begin;
37 struct alt_instr *end;
41 * Check if the target PC is within an alternative block.
43 static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
45 unsigned long replptr;
47 if (kernel_text_address(pc))
48 return 1;
50 replptr = (unsigned long)ALT_REPL_PTR(alt);
51 if (pc >= replptr && pc <= (replptr + alt->alt_len))
52 return 0;
55 * Branching into *another* alternate sequence is doomed, and
56 * we're not even trying to fix it up.
58 BUG();
61 #define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1))
63 static u32 get_alt_insn(struct alt_instr *alt, u32 *insnptr, u32 *altinsnptr)
65 u32 insn;
67 insn = le32_to_cpu(*altinsnptr);
69 if (aarch64_insn_is_branch_imm(insn)) {
70 s32 offset = aarch64_get_branch_offset(insn);
71 unsigned long target;
73 target = (unsigned long)altinsnptr + offset;
76 * If we're branching inside the alternate sequence,
77 * do not rewrite the instruction, as it is already
78 * correct. Otherwise, generate the new instruction.
80 if (branch_insn_requires_update(alt, target)) {
81 offset = target - (unsigned long)insnptr;
82 insn = aarch64_set_branch_offset(insn, offset);
84 } else if (aarch64_insn_is_adrp(insn)) {
85 s32 orig_offset, new_offset;
86 unsigned long target;
89 * If we're replacing an adrp instruction, which uses PC-relative
90 * immediate addressing, adjust the offset to reflect the new
91 * PC. adrp operates on 4K aligned addresses.
93 orig_offset = aarch64_insn_adrp_get_offset(insn);
94 target = align_down(altinsnptr, SZ_4K) + orig_offset;
95 new_offset = target - align_down(insnptr, SZ_4K);
96 insn = aarch64_insn_adrp_set_offset(insn, new_offset);
97 } else if (aarch64_insn_uses_literal(insn)) {
99 * Disallow patching unhandled instructions using PC relative
100 * literal addresses
102 BUG();
105 return insn;
108 static void __apply_alternatives(void *alt_region)
110 struct alt_instr *alt;
111 struct alt_region *region = alt_region;
112 u32 *origptr, *replptr;
114 for (alt = region->begin; alt < region->end; alt++) {
115 u32 insn;
116 int i, nr_inst;
118 if (!cpus_have_cap(alt->cpufeature))
119 continue;
121 BUG_ON(alt->alt_len != alt->orig_len);
123 pr_info_once("patching kernel code\n");
125 origptr = ALT_ORIG_PTR(alt);
126 replptr = ALT_REPL_PTR(alt);
127 nr_inst = alt->alt_len / sizeof(insn);
129 for (i = 0; i < nr_inst; i++) {
130 insn = get_alt_insn(alt, origptr + i, replptr + i);
131 *(origptr + i) = cpu_to_le32(insn);
134 flush_icache_range((uintptr_t)origptr,
135 (uintptr_t)(origptr + nr_inst));
140 * We might be patching the stop_machine state machine, so implement a
141 * really simple polling protocol here.
143 static int __apply_alternatives_multi_stop(void *unused)
145 static int patched = 0;
146 struct alt_region region = {
147 .begin = (struct alt_instr *)__alt_instructions,
148 .end = (struct alt_instr *)__alt_instructions_end,
151 /* We always have a CPU 0 at this point (__init) */
152 if (smp_processor_id()) {
153 while (!READ_ONCE(patched))
154 cpu_relax();
155 isb();
156 } else {
157 BUG_ON(patched);
158 __apply_alternatives(&region);
159 /* Barriers provided by the cache flushing */
160 WRITE_ONCE(patched, 1);
163 return 0;
166 void __init apply_alternatives_all(void)
168 /* better not try code patching on a live SMP system */
169 stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask);
172 void apply_alternatives(void *start, size_t length)
174 struct alt_region region = {
175 .begin = start,
176 .end = start + length,
179 __apply_alternatives(&region);