arch/arm64/kvm/hyp/s2-setup.c

   1 /*
   2  * Copyright (C) 2016 - ARM Ltd
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/types.h>
  19 #include <asm/kvm_arm.h>
  20 #include <asm/kvm_asm.h>
  21 #include <asm/kvm_hyp.h>
  22
  23 u32 __hyp_text __init_stage2_translation(void)
  24 {
  25         u64 val = VTCR_EL2_FLAGS;
  26         u64 parange;
  27         u64 tmp;
  28
  29         /*
  30          * Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS
  31          * bits in VTCR_EL2. Amusingly, the PARange is 4 bits, while
  32          * PS is only 3. Fortunately, bit 19 is RES0 in VTCR_EL2...
  33          */
  34         parange = read_sysreg(id_aa64mmfr0_el1) & 7;
  35         val |= parange << 16;
  36
  37         /* Compute the actual PARange... */
  38         switch (parange) {
  39         case 0:
  40                 parange = 32;
  41                 break;
  42         case 1:
  43                 parange = 36;
  44                 break;
  45         case 2:
  46                 parange = 40;
  47                 break;
  48         case 3:
  49                 parange = 42;
  50                 break;
  51         case 4:
  52                 parange = 44;
  53                 break;
  54         case 5:
  55         default:
  56                 parange = 48;
  57                 break;
  58         }
  59
  60         /*
  61          * ... and clamp it to 40 bits, unless we have some braindead
  62          * HW that implements less than that. In all cases, we'll
  63          * return that value for the rest of the kernel to decide what
  64          * to do.
  65          */
  66         val |= 64 - (parange > 40 ? 40 : parange);
  67
  68         /*
  69          * Check the availability of Hardware Access Flag / Dirty Bit
  70          * Management in ID_AA64MMFR1_EL1 and enable the feature in VTCR_EL2.
  71          */
  72         tmp = (read_sysreg(id_aa64mmfr1_el1) >> ID_AA64MMFR1_HADBS_SHIFT) & 0xf;
  73         if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) && tmp)
  74                 val |= VTCR_EL2_HA;
  75
  76         /*
  77          * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS
  78          * bit in VTCR_EL2.
  79          */
  80         tmp = (read_sysreg(id_aa64mmfr1_el1) >> ID_AA64MMFR1_VMIDBITS_SHIFT) & 0xf;
  81         val |= (tmp == ID_AA64MMFR1_VMIDBITS_16) ?
  82                         VTCR_EL2_VS_16BIT :
  83                         VTCR_EL2_VS_8BIT;
  84
  85         write_sysreg(val, vtcr_el2);
  86
  87         return parange;
  88 }