x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / m32r / boot / compressed / m32r_sio.c
blobcf3023dced49d7fbe55ab50a8f357b95e5f5194a
1 /*
2 * arch/m32r/boot/compressed/m32r_sio.c
4 * 2003-02-12: Takeo Takahashi
5 * 2006-11-30: OPSPUT support by Kazuhiro Inaoka
7 */
9 #include <asm/processor.h>
11 static void m32r_putc(char c);
13 static int puts(const char *s)
15 char c;
16 while ((c = *s++))
17 m32r_putc(c);
18 return 0;
21 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT)
22 #include <asm/m32r.h>
23 #include <asm/io.h>
25 #define USE_FPGA_MAP 0
27 #if USE_FPGA_MAP
29 * fpga configuration program uses MMU, and define map as same as
30 * M32104 uT-Engine board.
32 #define BOOT_SIO0STS (volatile unsigned short *)(0x02c00000 + 0x20006)
33 #define BOOT_SIO0TXB (volatile unsigned short *)(0x02c00000 + 0x2000c)
34 #else
35 #undef PLD_BASE
36 #if defined(CONFIG_PLAT_OPSPUT)
37 #define PLD_BASE 0x1cc00000
38 #else
39 #define PLD_BASE 0xa4c00000
40 #endif
41 #define BOOT_SIO0STS PLD_ESIO0STS
42 #define BOOT_SIO0TXB PLD_ESIO0TXB
43 #endif
45 static void m32r_putc(char c)
47 while ((*BOOT_SIO0STS & 0x3) != 0x3)
48 cpu_relax();
49 if (c == '\n') {
50 *BOOT_SIO0TXB = '\r';
51 while ((*BOOT_SIO0STS & 0x3) != 0x3)
52 cpu_relax();
54 *BOOT_SIO0TXB = c;
56 #else /* !(CONFIG_PLAT_M32700UT) */
57 #if defined(CONFIG_PLAT_MAPPI2)
58 #define SIO0STS (volatile unsigned short *)(0xa0efd000 + 14)
59 #define SIO0TXB (volatile unsigned short *)(0xa0efd000 + 30)
60 #else
61 #define SIO0STS (volatile unsigned short *)(0x00efd000 + 14)
62 #define SIO0TXB (volatile unsigned short *)(0x00efd000 + 30)
63 #endif
65 static void m32r_putc(char c)
67 while ((*SIO0STS & 0x1) == 0)
68 cpu_relax();
69 if (c == '\n') {
70 *SIO0TXB = '\r';
71 while ((*SIO0STS & 0x1) == 0)
72 cpu_relax();
74 *SIO0TXB = c;
76 #endif