x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / powerpc / include / asm / kvm_booke_hv_asm.h
blobe5f048bbcb7c43569a0b0d9e8155b1f2732d4839
1 /*
2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation.
7 */
9 #ifndef ASM_KVM_BOOKE_HV_ASM_H
10 #define ASM_KVM_BOOKE_HV_ASM_H
12 #ifdef __ASSEMBLY__
15 * All exceptions from guest state must go through KVM
16 * (except for those which are delivered directly to the guest) --
17 * there are no exceptions for which we fall through directly to
18 * the normal host handler.
20 * 32-bit host
21 * Expected inputs (normal exceptions):
22 * SCRATCH0 = saved r10
23 * r10 = thread struct
24 * r11 = appropriate SRR1 variant (currently used as scratch)
25 * r13 = saved CR
26 * *(r10 + THREAD_NORMSAVE(0)) = saved r11
27 * *(r10 + THREAD_NORMSAVE(2)) = saved r13
29 * Expected inputs (crit/mcheck/debug exceptions):
30 * appropriate SCRATCH = saved r8
31 * r8 = exception level stack frame
32 * r9 = *(r8 + _CCR) = saved CR
33 * r11 = appropriate SRR1 variant (currently used as scratch)
34 * *(r8 + GPR9) = saved r9
35 * *(r8 + GPR10) = saved r10 (r10 not yet clobbered)
36 * *(r8 + GPR11) = saved r11
38 * 64-bit host
39 * Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types):
40 * r10 = saved CR
41 * r13 = PACA_POINTER
42 * *(r13 + PACA_EX##type + EX_R10) = saved r10
43 * *(r13 + PACA_EX##type + EX_R11) = saved r11
44 * SPRN_SPRG_##type##_SCRATCH = saved r13
46 * Expected inputs (TLB exception type):
47 * r10 = saved CR
48 * r12 = extlb pointer
49 * r13 = PACA_POINTER
50 * *(r12 + EX_TLB_R10) = saved r10
51 * *(r12 + EX_TLB_R11) = saved r11
52 * *(r12 + EX_TLB_R13) = saved r13
53 * SPRN_SPRG_GEN_SCRATCH = saved r12
55 * Only the bolted version of TLB miss exception handlers is supported now.
57 .macro DO_KVM intno srr1
58 #ifdef CONFIG_KVM_BOOKE_HV
59 BEGIN_FTR_SECTION
60 mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */
61 bf 3, 1975f
62 b kvmppc_handler_\intno\()_\srr1
63 1975:
64 END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
65 #endif
66 .endm
68 #endif /*__ASSEMBLY__ */
69 #endif /* ASM_KVM_BOOKE_HV_ASM_H */