x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / powerpc / include / asm / pnv-pci.h
blobde9681034353c661d3e0a6299c3c6b7c3573b832
1 /*
2 * Copyright 2014 IBM Corp.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
10 #ifndef _ASM_PNV_PCI_H
11 #define _ASM_PNV_PCI_H
13 #include <linux/pci.h>
14 #include <linux/pci_hotplug.h>
15 #include <linux/irq.h>
16 #include <misc/cxl-base.h>
17 #include <asm/opal-api.h>
19 #define PCI_SLOT_ID_PREFIX (1UL << 63)
20 #define PCI_SLOT_ID(phb_id, bdfn) \
21 (PCI_SLOT_ID_PREFIX | ((uint64_t)(bdfn) << 16) | (phb_id))
23 extern int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id);
24 extern int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len);
25 extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state);
26 extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);
27 extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
28 struct opal_msg *msg);
30 int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);
31 int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
32 unsigned int virq);
33 int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num);
34 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
35 int pnv_cxl_get_irq_count(struct pci_dev *dev);
36 struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);
37 int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq);
38 bool is_pnv_opal_msi(struct irq_chip *chip);
40 #ifdef CONFIG_CXL_BASE
41 int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,
42 struct pci_dev *dev, int num);
43 void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,
44 struct pci_dev *dev);
46 /* Support for the cxl kernel api on the real PHB (instead of vPHB) */
47 int pnv_cxl_enable_phb_kernel_api(struct pci_controller *hose, bool enable);
48 bool pnv_pci_on_cxl_phb(struct pci_dev *dev);
49 struct cxl_afu *pnv_cxl_phb_to_afu(struct pci_controller *hose);
50 void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct cxl_afu *afu);
52 #endif
54 struct pnv_php_slot {
55 struct hotplug_slot slot;
56 struct hotplug_slot_info slot_info;
57 uint64_t id;
58 char *name;
59 int slot_no;
60 unsigned int flags;
61 #define PNV_PHP_FLAG_BROKEN_PDC 0x1
62 struct kref kref;
63 #define PNV_PHP_STATE_INITIALIZED 0
64 #define PNV_PHP_STATE_REGISTERED 1
65 #define PNV_PHP_STATE_POPULATED 2
66 #define PNV_PHP_STATE_OFFLINE 3
67 int state;
68 int irq;
69 struct workqueue_struct *wq;
70 struct device_node *dn;
71 struct pci_dev *pdev;
72 struct pci_bus *bus;
73 bool power_state_check;
74 void *fdt;
75 void *dt;
76 struct of_changeset ocs;
77 struct pnv_php_slot *parent;
78 struct list_head children;
79 struct list_head link;
81 extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn);
82 extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot,
83 uint8_t state);
85 #endif