x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / powerpc / include / asm / time.h
blobb240666b7bc1e9e11fc183183cbe37ed56de51e2
1 /*
2 * Common time prototypes and such for all ppc machines.
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #ifndef __POWERPC_TIME_H
14 #define __POWERPC_TIME_H
16 #ifdef __KERNEL__
17 #include <linux/types.h>
18 #include <linux/percpu.h>
20 #include <asm/processor.h>
21 #include <asm/cpu_has_feature.h>
23 /* time.c */
24 extern unsigned long tb_ticks_per_jiffy;
25 extern unsigned long tb_ticks_per_usec;
26 extern unsigned long tb_ticks_per_sec;
27 extern struct clock_event_device decrementer_clockevent;
29 struct rtc_time;
30 extern void to_tm(int tim, struct rtc_time * tm);
31 extern void tick_broadcast_ipi_handler(void);
33 extern void generic_calibrate_decr(void);
35 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
36 extern unsigned long ppc_proc_freq;
37 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
38 extern unsigned long ppc_tb_freq;
39 #define DEFAULT_TB_FREQ 125000000UL
41 struct div_result {
42 u64 result_high;
43 u64 result_low;
46 /* Accessor functions for the timebase (RTC on 601) registers. */
47 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
48 #ifdef CONFIG_6xx
49 #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
50 #else
51 #define __USE_RTC() 0
52 #endif
54 #ifdef CONFIG_PPC64
56 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
57 #define get_tbl get_tb
59 #else
61 static inline unsigned long get_tbl(void)
63 #if defined(CONFIG_403GCX)
64 unsigned long tbl;
65 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
66 return tbl;
67 #else
68 return mftbl();
69 #endif
72 static inline unsigned int get_tbu(void)
74 #ifdef CONFIG_403GCX
75 unsigned int tbu;
76 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
77 return tbu;
78 #else
79 return mftbu();
80 #endif
82 #endif /* !CONFIG_PPC64 */
84 static inline unsigned int get_rtcl(void)
86 unsigned int rtcl;
88 asm volatile("mfrtcl %0" : "=r" (rtcl));
89 return rtcl;
92 static inline u64 get_rtc(void)
94 unsigned int hi, lo, hi2;
96 do {
97 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
98 : "=r" (hi), "=r" (lo), "=r" (hi2));
99 } while (hi2 != hi);
100 return (u64)hi * 1000000000 + lo;
103 static inline u64 get_vtb(void)
105 #ifdef CONFIG_PPC_BOOK3S_64
106 if (cpu_has_feature(CPU_FTR_ARCH_207S))
107 return mfspr(SPRN_VTB);
108 #endif
109 return 0;
112 #ifdef CONFIG_PPC64
113 static inline u64 get_tb(void)
115 return mftb();
117 #else /* CONFIG_PPC64 */
118 static inline u64 get_tb(void)
120 unsigned int tbhi, tblo, tbhi2;
122 do {
123 tbhi = get_tbu();
124 tblo = get_tbl();
125 tbhi2 = get_tbu();
126 } while (tbhi != tbhi2);
128 return ((u64)tbhi << 32) | tblo;
130 #endif /* !CONFIG_PPC64 */
132 static inline u64 get_tb_or_rtc(void)
134 return __USE_RTC() ? get_rtc() : get_tb();
137 static inline void set_tb(unsigned int upper, unsigned int lower)
139 mtspr(SPRN_TBWL, 0);
140 mtspr(SPRN_TBWU, upper);
141 mtspr(SPRN_TBWL, lower);
144 /* Accessor functions for the decrementer register.
145 * The 4xx doesn't even have a decrementer. I tried to use the
146 * generic timer interrupt code, which seems OK, with the 4xx PIT
147 * in auto-reload mode. The problem is PIT stops counting when it
148 * hits zero. If it would wrap, we could use it just like a decrementer.
150 static inline u64 get_dec(void)
152 #if defined(CONFIG_40x)
153 return (mfspr(SPRN_PIT));
154 #else
155 return (mfspr(SPRN_DEC));
156 #endif
160 * Note: Book E and 4xx processors differ from other PowerPC processors
161 * in when the decrementer generates its interrupt: on the 1 to 0
162 * transition for Book E/4xx, but on the 0 to -1 transition for others.
164 static inline void set_dec(u64 val)
166 #if defined(CONFIG_40x)
167 mtspr(SPRN_PIT, (u32) val);
168 #else
169 #ifndef CONFIG_BOOKE
170 --val;
171 #endif
172 mtspr(SPRN_DEC, val);
173 #endif /* not 40x */
176 static inline unsigned long tb_ticks_since(unsigned long tstamp)
178 if (__USE_RTC()) {
179 int delta = get_rtcl() - (unsigned int) tstamp;
180 return delta < 0 ? delta + 1000000000 : delta;
182 return get_tbl() - tstamp;
185 #define mulhwu(x,y) \
186 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
188 #ifdef CONFIG_PPC64
189 #define mulhdu(x,y) \
190 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
191 #else
192 extern u64 mulhdu(u64, u64);
193 #endif
195 extern void div128_by_32(u64 dividend_high, u64 dividend_low,
196 unsigned divisor, struct div_result *dr);
198 /* Used to store Processor Utilization register (purr) values */
200 struct cpu_usage {
201 u64 current_tb; /* Holds the current purr register values */
204 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
206 extern void secondary_cpu_time_init(void);
208 DECLARE_PER_CPU(u64, decrementers_next_tb);
210 /* Convert timebase ticks to nanoseconds */
211 unsigned long long tb_to_ns(unsigned long long tb_ticks);
213 #endif /* __KERNEL__ */
214 #endif /* __POWERPC_TIME_H */