x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / sparc / include / asm / io_32.h
blob4dd268a3a8b083942210e6c3892c9e43de1c2c70
1 #ifndef __SPARC_IO_H
2 #define __SPARC_IO_H
4 #include <linux/kernel.h>
5 #include <linux/ioport.h> /* struct resource */
7 #define IO_SPACE_LIMIT 0xffffffff
9 #define memset_io(d,c,sz) _memset_io(d,c,sz)
10 #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
11 #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
13 #include <asm-generic/io.h>
15 static inline void _memset_io(volatile void __iomem *dst,
16 int c, __kernel_size_t n)
18 volatile void __iomem *d = dst;
20 while (n--) {
21 writeb(c, d);
22 d++;
26 static inline void _memcpy_fromio(void *dst, const volatile void __iomem *src,
27 __kernel_size_t n)
29 char *d = dst;
31 while (n--) {
32 char tmp = readb(src);
33 *d++ = tmp;
34 src++;
38 static inline void _memcpy_toio(volatile void __iomem *dst, const void *src,
39 __kernel_size_t n)
41 const char *s = src;
42 volatile void __iomem *d = dst;
44 while (n--) {
45 char tmp = *s++;
46 writeb(tmp, d);
47 d++;
52 * SBus accessors.
54 * SBus has only one, memory mapped, I/O space.
55 * We do not need to flip bytes for SBus of course.
57 static inline u8 sbus_readb(const volatile void __iomem *addr)
59 return *(__force volatile u8 *)addr;
62 static inline u16 sbus_readw(const volatile void __iomem *addr)
64 return *(__force volatile u16 *)addr;
67 static inline u32 sbus_readl(const volatile void __iomem *addr)
69 return *(__force volatile u32 *)addr;
72 static inline void sbus_writeb(u8 b, volatile void __iomem *addr)
74 *(__force volatile u8 *)addr = b;
77 static inline void sbus_writew(u16 w, volatile void __iomem *addr)
79 *(__force volatile u16 *)addr = w;
82 static inline void sbus_writel(u32 l, volatile void __iomem *addr)
84 *(__force volatile u32 *)addr = l;
87 static inline void sbus_memset_io(volatile void __iomem *__dst, int c,
88 __kernel_size_t n)
90 while(n--) {
91 sbus_writeb(c, __dst);
92 __dst++;
96 static inline void sbus_memcpy_fromio(void *dst,
97 const volatile void __iomem *src,
98 __kernel_size_t n)
100 char *d = dst;
102 while (n--) {
103 char tmp = sbus_readb(src);
104 *d++ = tmp;
105 src++;
109 static inline void sbus_memcpy_toio(volatile void __iomem *dst,
110 const void *src,
111 __kernel_size_t n)
113 const char *s = src;
114 volatile void __iomem *d = dst;
116 while (n--) {
117 char tmp = *s++;
118 sbus_writeb(tmp, d);
119 d++;
123 #ifdef __KERNEL__
126 * Bus number may be embedded in the higher bits of the physical address.
127 * This is why we have no bus number argument to ioremap().
129 void __iomem *ioremap(unsigned long offset, unsigned long size);
130 #define ioremap_nocache(X,Y) ioremap((X),(Y))
131 #define ioremap_wc(X,Y) ioremap((X),(Y))
132 #define ioremap_wt(X,Y) ioremap((X),(Y))
133 void iounmap(volatile void __iomem *addr);
135 /* Create a virtual mapping cookie for an IO port range */
136 void __iomem *ioport_map(unsigned long port, unsigned int nr);
137 void ioport_unmap(void __iomem *);
139 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
140 struct pci_dev;
141 void pci_iounmap(struct pci_dev *dev, void __iomem *);
143 static inline int sbus_can_dma_64bit(void)
145 return 0; /* actually, sparc_cpu_model==sun4d */
147 static inline int sbus_can_burst64(void)
149 return 0; /* actually, sparc_cpu_model==sun4d */
151 struct device;
152 void sbus_set_sbus64(struct device *, int);
154 #endif
156 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
159 #endif /* !(__SPARC_IO_H) */