x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / x86 / include / asm / acenv.h
blob1b010a859b8b4816c7b28decea1f853eb0b2b5b3
1 /*
2 * X86 specific ACPICA environments and implementation
4 * Copyright (C) 2014, Intel Corporation
5 * Author: Lv Zheng <lv.zheng@intel.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef _ASM_X86_ACENV_H
13 #define _ASM_X86_ACENV_H
15 #include <asm/special_insns.h>
17 /* Asm macros */
19 #define ACPI_FLUSH_CPU_CACHE() wbinvd()
21 int __acpi_acquire_global_lock(unsigned int *lock);
22 int __acpi_release_global_lock(unsigned int *lock);
24 #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
25 ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
27 #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
28 ((Acq) = __acpi_release_global_lock(&facs->global_lock))
31 * Math helper asm macros
33 #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
34 asm("divl %2;" \
35 : "=a"(q32), "=d"(r32) \
36 : "r"(d32), \
37 "0"(n_lo), "1"(n_hi))
39 #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
40 asm("shrl $1,%2 ;" \
41 "rcrl $1,%3;" \
42 : "=r"(n_hi), "=r"(n_lo) \
43 : "0"(n_hi), "1"(n_lo))
45 #endif /* _ASM_X86_ACENV_H */