arch/x86/include/asm/acpi.h

   1 #ifndef _ASM_X86_ACPI_H
   2 #define _ASM_X86_ACPI_H
   3
   4 /*
   5  *  Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   6  *  Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
   7  *
   8  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   9  *
  10  *  This program is free software; you can redistribute it and/or modify
  11  *  it under the terms of the GNU General Public License as published by
  12  *  the Free Software Foundation; either version 2 of the License, or
  13  *  (at your option) any later version.
  14  *
  15  *  This program is distributed in the hope that it will be useful,
  16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *  GNU General Public License for more details.
  19  *
  20  *  You should have received a copy of the GNU General Public License
  21  *  along with this program; if not, write to the Free Software
  22  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  23  *
  24  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  25  */
  26 #include <acpi/pdc_intel.h>
  27
  28 #include <asm/numa.h>
  29 #include <asm/fixmap.h>
  30 #include <asm/processor.h>
  31 #include <asm/mmu.h>
  32 #include <asm/mpspec.h>
  33 #include <asm/realmode.h>
  34
  35 #ifdef CONFIG_ACPI_APEI
  36 # include <asm/pgtable_types.h>
  37 #endif
  38
  39 #ifdef CONFIG_ACPI
  40 extern int acpi_lapic;
  41 extern int acpi_ioapic;
  42 extern int acpi_noirq;
  43 extern int acpi_strict;
  44 extern int acpi_disabled;
  45 extern int acpi_pci_disabled;
  46 extern int acpi_skip_timer_override;
  47 extern int acpi_use_timer_override;
  48 extern int acpi_fix_pin2_polarity;
  49 extern int acpi_disable_cmcff;
  50
  51 extern u8 acpi_sci_flags;
  52 extern int acpi_sci_override_gsi;
  53 void acpi_pic_sci_set_trigger(unsigned int, u16);
  54
  55 extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
  56                                   int trigger, int polarity);
  57 extern void (*__acpi_unregister_gsi)(u32 gsi);
  58
  59 static inline void disable_acpi(void)
  60 {
  61         acpi_disabled = 1;
  62         acpi_pci_disabled = 1;
  63         acpi_noirq = 1;
  64 }
  65
  66 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
  67
  68 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
  69 static inline void acpi_disable_pci(void)
  70 {
  71         acpi_pci_disabled = 1;
  72         acpi_noirq_set();
  73 }
  74
  75 /* Low-level suspend routine. */
  76 extern int (*acpi_suspend_lowlevel)(void);
  77
  78 /* Physical address to resume after wakeup */
  79 #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
  80
  81 /*
  82  * Check if the CPU can handle C2 and deeper
  83  */
  84 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
  85 {
  86         /*
  87          * Early models (<=5) of AMD Opterons are not supposed to go into
  88          * C2 state.
  89          *
  90          * Steppings 0x0A and later are good
  91          */
  92         if (boot_cpu_data.x86 == 0x0F &&
  93             boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  94             boot_cpu_data.x86_model <= 0x05 &&
  95             boot_cpu_data.x86_mask < 0x0A)
  96                 return 1;
  97         else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E))
  98                 return 1;
  99         else
 100                 return max_cstate;
 101 }
 102
 103 static inline bool arch_has_acpi_pdc(void)
 104 {
 105         struct cpuinfo_x86 *c = &cpu_data(0);
 106         return (c->x86_vendor == X86_VENDOR_INTEL ||
 107                 c->x86_vendor == X86_VENDOR_CENTAUR);
 108 }
 109
 110 static inline void arch_acpi_set_pdc_bits(u32 *buf)
 111 {
 112         struct cpuinfo_x86 *c = &cpu_data(0);
 113
 114         buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
 115
 116         if (cpu_has(c, X86_FEATURE_EST))
 117                 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
 118
 119         if (cpu_has(c, X86_FEATURE_ACPI))
 120                 buf[2] |= ACPI_PDC_T_FFH;
 121
 122         /*
 123          * If mwait/monitor is unsupported, C2/C3_FFH will be disabled
 124          */
 125         if (!cpu_has(c, X86_FEATURE_MWAIT))
 126                 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
 127 }
 128
 129 static inline bool acpi_has_cpu_in_madt(void)
 130 {
 131         return !!acpi_lapic;
 132 }
 133
 134 #else /* !CONFIG_ACPI */
 135
 136 #define acpi_lapic 0
 137 #define acpi_ioapic 0
 138 #define acpi_disable_cmcff 0
 139 static inline void acpi_noirq_set(void) { }
 140 static inline void acpi_disable_pci(void) { }
 141 static inline void disable_acpi(void) { }
 142
 143 #endif /* !CONFIG_ACPI */
 144
 145 #define ARCH_HAS_POWER_INIT     1
 146
 147 #ifdef CONFIG_ACPI_NUMA
 148 extern int x86_acpi_numa_init(void);
 149 #endif /* CONFIG_ACPI_NUMA */
 150
 151 #define acpi_unlazy_tlb(x)      leave_mm(x)
 152
 153 #ifdef CONFIG_ACPI_APEI
 154 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
 155 {
 156         /*
 157          * We currently have no way to look up the EFI memory map
 158          * attributes for a region in a consistent way, because the
 159          * memmap is discarded after efi_free_boot_services(). So if
 160          * you call efi_mem_attributes() during boot and at runtime,
 161          * you could theoretically see different attributes.
 162          *
 163          * Since we are yet to see any x86 platforms that require
 164          * anything other than PAGE_KERNEL (some arm64 platforms
 165          * require the equivalent of PAGE_KERNEL_NOCACHE), return that
 166          * until we know differently.
 167          */
 168          return PAGE_KERNEL;
 169 }
 170 #endif
 171
 172 #define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT)
 173
 174 #endif /* _ASM_X86_ACPI_H */