x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / x86 / include / asm / msidef.h
blob4cc48af23fefa3e9bec1da781d13ea5beaebd379
1 #ifndef _ASM_X86_MSIDEF_H
2 #define _ASM_X86_MSIDEF_H
4 /*
5 * Constants for Intel APIC based MSI messages.
6 */
8 /*
9 * Shifts for MSI data
12 #define MSI_DATA_VECTOR_SHIFT 0
13 #define MSI_DATA_VECTOR_MASK 0x000000ff
14 #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \
15 MSI_DATA_VECTOR_MASK)
17 #define MSI_DATA_DELIVERY_MODE_SHIFT 8
18 #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
19 #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
21 #define MSI_DATA_LEVEL_SHIFT 14
22 #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
23 #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
25 #define MSI_DATA_TRIGGER_SHIFT 15
26 #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
27 #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
30 * Shift/mask fields for msi address
33 #define MSI_ADDR_BASE_HI 0
34 #define MSI_ADDR_BASE_LO 0xfee00000
36 #define MSI_ADDR_DEST_MODE_SHIFT 2
37 #define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT)
38 #define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT)
40 #define MSI_ADDR_REDIRECTION_SHIFT 3
41 #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
42 /* dedicated cpu */
43 #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
44 /* lowest priority */
46 #define MSI_ADDR_DEST_ID_SHIFT 12
47 #define MSI_ADDR_DEST_ID_MASK 0x00ffff0
48 #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
49 MSI_ADDR_DEST_ID_MASK)
50 #define MSI_ADDR_EXT_DEST_ID(dest) ((dest) & 0xffffff00)
52 #define MSI_ADDR_IR_EXT_INT (1 << 4)
53 #define MSI_ADDR_IR_SHV (1 << 3)
54 #define MSI_ADDR_IR_INDEX1(index) ((index & 0x8000) >> 13)
55 #define MSI_ADDR_IR_INDEX2(index) ((index & 0x7fff) << 5)
56 #endif /* _ASM_X86_MSIDEF_H */