1 #ifndef _ASM_X86_UV_BIOS_H
2 #define _ASM_X86_UV_BIOS_H
5 * UV BIOS layer definitions.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Copyright (c) 2008-2009 Silicon Graphics, Inc. All Rights Reserved.
22 * Copyright (c) Russ Anderson <rja@sgi.com>
25 #include <linux/rtc.h>
28 * Values for the BIOS calls. It is passed as the first * argument in the
29 * BIOS call. Passing any other value in the first argument will result
30 * in a BIOS_STATUS_UNIMPLEMENTED return status.
36 UV_BIOS_WATCHLIST_ALLOC
,
37 UV_BIOS_WATCHLIST_FREE
,
39 UV_BIOS_GET_PARTITION_ADDR
,
40 UV_BIOS_SET_LEGACY_VGA_TARGET
44 * Status values returned from a BIOS call.
47 BIOS_STATUS_MORE_PASSES
= 1,
48 BIOS_STATUS_SUCCESS
= 0,
49 BIOS_STATUS_UNIMPLEMENTED
= -ENOSYS
,
50 BIOS_STATUS_EINVAL
= -EINVAL
,
51 BIOS_STATUS_UNAVAIL
= -EBUSY
54 /* Address map parameters */
55 struct uv_gam_parameters
{
58 u8 mmr_shift
; /* Convert PNode to MMR space offset */
59 u8 gru_shift
; /* Convert PNode to GRU space offset */
60 u8 gpa_shift
; /* Size of offset field in GRU phys addr */
64 /* UV_TABLE_GAM_RANGE_ENTRY values */
65 #define UV_GAM_RANGE_TYPE_UNUSED 0 /* End of table */
66 #define UV_GAM_RANGE_TYPE_RAM 1 /* Normal RAM */
67 #define UV_GAM_RANGE_TYPE_NVRAM 2 /* Non-volatile memory */
68 #define UV_GAM_RANGE_TYPE_NV_WINDOW 3 /* NVMDIMM block window */
69 #define UV_GAM_RANGE_TYPE_NV_MAILBOX 4 /* NVMDIMM mailbox */
70 #define UV_GAM_RANGE_TYPE_HOLE 5 /* Unused address range */
71 #define UV_GAM_RANGE_TYPE_MAX 6
73 /* The structure stores PA bits 56:26, for 64MB granularity */
74 #define UV_GAM_RANGE_SHFT 26 /* 64MB */
76 struct uv_gam_range_entry
{
77 char type
; /* Entry type: GAM_RANGE_TYPE_UNUSED, etc. */
79 u16 nasid
; /* HNasid */
80 u16 sockid
; /* Socket ID, high bits of APIC ID */
81 u16 pnode
; /* Index to MMR and GRU spaces */
83 u32 limit
; /* PA bits 56:26 (UV_GAM_RANGE_SHFT) */
86 #define UV_SYSTAB_SIG "UVST"
87 #define UV_SYSTAB_VERSION_1 1 /* UV1/2/3 BIOS version */
88 #define UV_SYSTAB_VERSION_UV4 0x400 /* UV4 BIOS base version */
89 #define UV_SYSTAB_VERSION_UV4_1 0x401 /* + gpa_shift */
90 #define UV_SYSTAB_VERSION_UV4_2 0x402 /* + TYPE_NVRAM/WINDOW/MBOX */
91 #define UV_SYSTAB_VERSION_UV4_3 0x403 /* - GAM Range PXM Value */
92 #define UV_SYSTAB_VERSION_UV4_LATEST UV_SYSTAB_VERSION_UV4_3
94 #define UV_SYSTAB_TYPE_UNUSED 0 /* End of table (offset == 0) */
95 #define UV_SYSTAB_TYPE_GAM_PARAMS 1 /* GAM PARAM conversions */
96 #define UV_SYSTAB_TYPE_GAM_RNG_TBL 2 /* GAM entry table */
97 #define UV_SYSTAB_TYPE_MAX 3
100 * The UV system table describes specific firmware
101 * capabilities available to the Linux kernel at runtime.
104 char signature
[4]; /* must be UV_SYSTAB_SIG */
105 u32 revision
; /* distinguish different firmware revs */
106 u64 function
; /* BIOS runtime callback function ptr */
107 u32 size
; /* systab size (starting with _VERSION_UV4) */
109 u32 type
:8; /* type of entry */
110 u32 offset
:24; /* byte offset from struct start to entry */
111 } entry
[1]; /* additional entries follow */
113 extern struct uv_systab
*uv_systab
;
114 /* (... end of definitions from UV BIOS ...) */
117 BIOS_FREQ_BASE_PLATFORM
= 0,
118 BIOS_FREQ_BASE_INTERVAL_TIMER
= 1,
119 BIOS_FREQ_BASE_REALTIME_CLOCK
= 2
122 union partition_info_u
{
133 UV_MEMPROT_RESTRICT_ACCESS
,
134 UV_MEMPROT_ALLOW_AMO
,
139 * bios calls have 6 parameters
141 extern s64
uv_bios_call(enum uv_bios_cmd
, u64
, u64
, u64
, u64
, u64
);
142 extern s64
uv_bios_call_irqsave(enum uv_bios_cmd
, u64
, u64
, u64
, u64
, u64
);
143 extern s64
uv_bios_call_reentrant(enum uv_bios_cmd
, u64
, u64
, u64
, u64
, u64
);
145 extern s64
uv_bios_get_sn_info(int, int *, long *, long *, long *, long *);
146 extern s64
uv_bios_freq_base(u64
, u64
*);
147 extern int uv_bios_mq_watchlist_alloc(unsigned long, unsigned int,
149 extern int uv_bios_mq_watchlist_free(int, int);
150 extern s64
uv_bios_change_memprotect(u64
, u64
, enum uv_memprotect
);
151 extern s64
uv_bios_reserved_page_pa(u64
, u64
*, u64
*, u64
*);
152 extern int uv_bios_set_legacy_vga_target(bool decode
, int domain
, int bus
);
155 extern void uv_bios_init(void);
157 void uv_bios_init(void) { }
160 extern unsigned long sn_rtc_cycles_per_second
;
162 extern long sn_partition_id
;
163 extern long sn_coherency_id
;
164 extern long sn_region_size
;
165 extern long system_serial_number
;
166 #define uv_partition_coherence_id() (sn_coherency_id)
168 extern struct kobject
*sgi_uv_kobj
; /* /sys/firmware/sgi_uv */
170 #endif /* _ASM_X86_UV_BIOS_H */