drivers/clocksource/dw_apb_timer_of.c

   1 /*
   2  * Copyright (C) 2012 Altera Corporation
   3  * Copyright (c) 2011 Picochip Ltd., Jamie Iles
   4  *
   5  * Modified from mach-picoxcell/time.c
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <linux/delay.h>
  20 #include <linux/dw_apb_timer.h>
  21 #include <linux/of.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/clk.h>
  25 #include <linux/sched_clock.h>
  26
  27 static void __init timer_get_base_and_rate(struct device_node *np,
  28                                     void __iomem **base, u32 *rate)
  29 {
  30         struct clk *timer_clk;
  31         struct clk *pclk;
  32
  33         *base = of_iomap(np, 0);
  34
  35         if (!*base)
  36                 panic("Unable to map regs for %s", np->name);
  37
  38         /*
  39          * Not all implementations use a periphal clock, so don't panic
  40          * if it's not present
  41          */
  42         pclk = of_clk_get_by_name(np, "pclk");
  43         if (!IS_ERR(pclk))
  44                 if (clk_prepare_enable(pclk))
  45                         pr_warn("pclk for %s is present, but could not be activated\n",
  46                                 np->name);
  47
  48         timer_clk = of_clk_get_by_name(np, "timer");
  49         if (IS_ERR(timer_clk))
  50                 goto try_clock_freq;
  51
  52         if (!clk_prepare_enable(timer_clk)) {
  53                 *rate = clk_get_rate(timer_clk);
  54                 return;
  55         }
  56
  57 try_clock_freq:
  58         if (of_property_read_u32(np, "clock-freq", rate) &&
  59             of_property_read_u32(np, "clock-frequency", rate))
  60                 panic("No clock nor clock-frequency property for %s", np->name);
  61 }
  62
  63 static void __init add_clockevent(struct device_node *event_timer)
  64 {
  65         void __iomem *iobase;
  66         struct dw_apb_clock_event_device *ced;
  67         u32 irq, rate;
  68
  69         irq = irq_of_parse_and_map(event_timer, 0);
  70         if (irq == 0)
  71                 panic("No IRQ for clock event timer");
  72
  73         timer_get_base_and_rate(event_timer, &iobase, &rate);
  74
  75         ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
  76                                      rate);
  77         if (!ced)
  78                 panic("Unable to initialise clockevent device");
  79
  80         dw_apb_clockevent_register(ced);
  81 }
  82
  83 static void __iomem *sched_io_base;
  84 static u32 sched_rate;
  85
  86 static void __init add_clocksource(struct device_node *source_timer)
  87 {
  88         void __iomem *iobase;
  89         struct dw_apb_clocksource *cs;
  90         u32 rate;
  91
  92         timer_get_base_and_rate(source_timer, &iobase, &rate);
  93
  94         cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
  95         if (!cs)
  96                 panic("Unable to initialise clocksource device");
  97
  98         dw_apb_clocksource_start(cs);
  99         dw_apb_clocksource_register(cs);
 100
 101         /*
 102          * Fallback to use the clocksource as sched_clock if no separate
 103          * timer is found. sched_io_base then points to the current_value
 104          * register of the clocksource timer.
 105          */
 106         sched_io_base = iobase + 0x04;
 107         sched_rate = rate;
 108 }
 109
 110 static u64 notrace read_sched_clock(void)
 111 {
 112         return ~readl_relaxed(sched_io_base);
 113 }
 114
 115 static const struct of_device_id sptimer_ids[] __initconst = {
 116         { .compatible = "picochip,pc3x2-rtc" },
 117         { /* Sentinel */ },
 118 };
 119
 120 static void __init init_sched_clock(void)
 121 {
 122         struct device_node *sched_timer;
 123
 124         sched_timer = of_find_matching_node(NULL, sptimer_ids);
 125         if (sched_timer) {
 126                 timer_get_base_and_rate(sched_timer, &sched_io_base,
 127                                         &sched_rate);
 128                 of_node_put(sched_timer);
 129         }
 130
 131         sched_clock_register(read_sched_clock, 32, sched_rate);
 132 }
 133
 134 #ifdef CONFIG_ARM
 135 static unsigned long dw_apb_delay_timer_read(void)
 136 {
 137         return ~readl_relaxed(sched_io_base);
 138 }
 139
 140 static struct delay_timer dw_apb_delay_timer = {
 141         .read_current_timer     = dw_apb_delay_timer_read,
 142 };
 143 #endif
 144
 145 static int num_called;
 146 static int __init dw_apb_timer_init(struct device_node *timer)
 147 {
 148         switch (num_called) {
 149         case 0:
 150                 pr_debug("%s: found clockevent timer\n", __func__);
 151                 add_clockevent(timer);
 152                 break;
 153         case 1:
 154                 pr_debug("%s: found clocksource timer\n", __func__);
 155                 add_clocksource(timer);
 156                 init_sched_clock();
 157 #ifdef CONFIG_ARM
 158                 dw_apb_delay_timer.freq = sched_rate;
 159                 register_current_timer_delay(&dw_apb_delay_timer);
 160 #endif
 161                 break;
 162         default:
 163                 break;
 164         }
 165
 166         num_called++;
 167
 168         return 0;
 169 }
 170 CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
 171 CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
 172 CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
 173 CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);