2 * Renesas Timer Support - OSTM
4 * Copyright (C) 2017 Renesas Electronics America, Inc.
5 * Copyright (C) 2017 Chris Brandt
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/clk.h>
21 #include <linux/clockchips.h>
22 #include <linux/interrupt.h>
23 #include <linux/sched_clock.h>
24 #include <linux/slab.h>
27 * The OSTM contains independent channels.
28 * The first OSTM channel probed will be set up as a free running
29 * clocksource. Additionally we will use this clocksource for the system
30 * schedule timer sched_clock().
32 * The second (or more) channel probed will be set up as an interrupt
38 unsigned long ticks_per_jiffy
;
39 struct clock_event_device ced
;
42 static void __iomem
*system_clock
; /* For sched_clock() */
45 #define OSTM_CMP 0x000 /* RW,32 */
46 #define OSTM_CNT 0x004 /* R,32 */
47 #define OSTM_TE 0x010 /* R,8 */
48 #define OSTM_TS 0x014 /* W,8 */
49 #define OSTM_TT 0x018 /* W,8 */
50 #define OSTM_CTL 0x020 /* RW,8 */
55 #define CTL_PERIODIC 0x00
56 #define CTL_ONESHOT 0x02
57 #define CTL_FREERUN 0x02
59 static struct ostm_device
*ced_to_ostm(struct clock_event_device
*ced
)
61 return container_of(ced
, struct ostm_device
, ced
);
64 static void ostm_timer_stop(struct ostm_device
*ostm
)
66 if (readb(ostm
->base
+ OSTM_TE
) & TE
) {
67 writeb(TT
, ostm
->base
+ OSTM_TT
);
70 * Read back the register simply to confirm the write operation
71 * has completed since I/O writes can sometimes get queued by
72 * the bus architecture.
74 while (readb(ostm
->base
+ OSTM_TE
) & TE
)
79 static int __init
ostm_init_clksrc(struct ostm_device
*ostm
, unsigned long rate
)
82 * irq not used (clock sources don't use interrupts)
85 ostm_timer_stop(ostm
);
87 writel(0, ostm
->base
+ OSTM_CMP
);
88 writeb(CTL_FREERUN
, ostm
->base
+ OSTM_CTL
);
89 writeb(TS
, ostm
->base
+ OSTM_TS
);
91 return clocksource_mmio_init(ostm
->base
+ OSTM_CNT
,
93 300, 32, clocksource_mmio_readl_up
);
96 static u64 notrace
ostm_read_sched_clock(void)
98 return readl(system_clock
);
101 static void __init
ostm_init_sched_clock(struct ostm_device
*ostm
,
104 system_clock
= ostm
->base
+ OSTM_CNT
;
105 sched_clock_register(ostm_read_sched_clock
, 32, rate
);
108 static int ostm_clock_event_next(unsigned long delta
,
109 struct clock_event_device
*ced
)
111 struct ostm_device
*ostm
= ced_to_ostm(ced
);
113 ostm_timer_stop(ostm
);
115 writel(delta
, ostm
->base
+ OSTM_CMP
);
116 writeb(CTL_ONESHOT
, ostm
->base
+ OSTM_CTL
);
117 writeb(TS
, ostm
->base
+ OSTM_TS
);
122 static int ostm_shutdown(struct clock_event_device
*ced
)
124 struct ostm_device
*ostm
= ced_to_ostm(ced
);
126 ostm_timer_stop(ostm
);
130 static int ostm_set_periodic(struct clock_event_device
*ced
)
132 struct ostm_device
*ostm
= ced_to_ostm(ced
);
134 if (clockevent_state_oneshot(ced
) || clockevent_state_periodic(ced
))
135 ostm_timer_stop(ostm
);
137 writel(ostm
->ticks_per_jiffy
- 1, ostm
->base
+ OSTM_CMP
);
138 writeb(CTL_PERIODIC
, ostm
->base
+ OSTM_CTL
);
139 writeb(TS
, ostm
->base
+ OSTM_TS
);
144 static int ostm_set_oneshot(struct clock_event_device
*ced
)
146 struct ostm_device
*ostm
= ced_to_ostm(ced
);
148 ostm_timer_stop(ostm
);
153 static irqreturn_t
ostm_timer_interrupt(int irq
, void *dev_id
)
155 struct ostm_device
*ostm
= dev_id
;
157 if (clockevent_state_oneshot(&ostm
->ced
))
158 ostm_timer_stop(ostm
);
160 /* notify clockevent layer */
161 if (ostm
->ced
.event_handler
)
162 ostm
->ced
.event_handler(&ostm
->ced
);
167 static int __init
ostm_init_clkevt(struct ostm_device
*ostm
, int irq
,
170 struct clock_event_device
*ced
= &ostm
->ced
;
173 ret
= request_irq(irq
, ostm_timer_interrupt
,
174 IRQF_TIMER
| IRQF_IRQPOLL
,
177 pr_err("ostm: failed to request irq\n");
182 ced
->features
= CLOCK_EVT_FEAT_ONESHOT
| CLOCK_EVT_FEAT_PERIODIC
;
183 ced
->set_state_shutdown
= ostm_shutdown
;
184 ced
->set_state_periodic
= ostm_set_periodic
;
185 ced
->set_state_oneshot
= ostm_set_oneshot
;
186 ced
->set_next_event
= ostm_clock_event_next
;
189 ced
->cpumask
= cpumask_of(0);
190 clockevents_config_and_register(ced
, rate
, 0xf, 0xffffffff);
195 static int __init
ostm_init(struct device_node
*np
)
197 struct ostm_device
*ostm
;
199 struct clk
*ostm_clk
= NULL
;
203 ostm
= kzalloc(sizeof(*ostm
), GFP_KERNEL
);
207 ostm
->base
= of_iomap(np
, 0);
209 pr_err("ostm: failed to remap I/O memory\n");
213 irq
= irq_of_parse_and_map(np
, 0);
215 pr_err("ostm: Failed to get irq\n");
219 ostm_clk
= of_clk_get(np
, 0);
220 if (IS_ERR(ostm_clk
)) {
221 pr_err("ostm: Failed to get clock\n");
226 ret
= clk_prepare_enable(ostm_clk
);
228 pr_err("ostm: Failed to enable clock\n");
232 rate
= clk_get_rate(ostm_clk
);
233 ostm
->ticks_per_jiffy
= (rate
+ HZ
/ 2) / HZ
;
236 * First probed device will be used as system clocksource. Any
237 * additional devices will be used as clock events.
240 ret
= ostm_init_clksrc(ostm
, rate
);
243 ostm_init_sched_clock(ostm
, rate
);
244 pr_info("ostm: used for clocksource\n");
248 ret
= ostm_init_clkevt(ostm
, irq
, rate
);
251 pr_info("ostm: used for clock events\n");
256 clk_disable_unprepare(ostm_clk
);
265 CLOCKSOURCE_OF_DECLARE(ostm
, "renesas,ostm", ostm_init
);