drivers/crypto/nx/nx-842.h

   1
   2 #ifndef __NX_842_H__
   3 #define __NX_842_H__
   4
   5 #include <linux/kernel.h>
   6 #include <linux/init.h>
   7 #include <linux/module.h>
   8 #include <linux/crypto.h>
   9 #include <linux/of.h>
  10 #include <linux/slab.h>
  11 #include <linux/io.h>
  12 #include <linux/mm.h>
  13 #include <linux/ratelimit.h>
  14
  15 /* Restrictions on Data Descriptor List (DDL) and Entry (DDE) buffers
  16  *
  17  * From NX P8 workbook, sec 4.9.1 "842 details"
  18  *   Each DDE buffer is 128 byte aligned
  19  *   Each DDE buffer size is a multiple of 32 bytes (except the last)
  20  *   The last DDE buffer size is a multiple of 8 bytes
  21  */
  22 #define DDE_BUFFER_ALIGN        (128)
  23 #define DDE_BUFFER_SIZE_MULT    (32)
  24 #define DDE_BUFFER_LAST_MULT    (8)
  25
  26 /* Arbitrary DDL length limit
  27  * Allows max buffer size of MAX-1 to MAX pages
  28  * (depending on alignment)
  29  */
  30 #define DDL_LEN_MAX             (17)
  31
  32 /* CCW 842 CI/FC masks
  33  * NX P8 workbook, section 4.3.1, figure 4-6
  34  * "CI/FC Boundary by NX CT type"
  35  */
  36 #define CCW_CI_842              (0x00003ff8)
  37 #define CCW_FC_842              (0x00000007)
  38
  39 /* CCW Function Codes (FC) for 842
  40  * NX P8 workbook, section 4.9, table 4-28
  41  * "Function Code Definitions for 842 Memory Compression"
  42  */
  43 #define CCW_FC_842_COMP_NOCRC   (0)
  44 #define CCW_FC_842_COMP_CRC     (1)
  45 #define CCW_FC_842_DECOMP_NOCRC (2)
  46 #define CCW_FC_842_DECOMP_CRC   (3)
  47 #define CCW_FC_842_MOVE         (4)
  48
  49 /* CSB CC Error Types for 842
  50  * NX P8 workbook, section 4.10.3, table 4-30
  51  * "Reported Error Types Summary Table"
  52  */
  53 /* These are all duplicates of existing codes defined in icswx.h. */
  54 #define CSB_CC_TRANSLATION_DUP1 (80)
  55 #define CSB_CC_TRANSLATION_DUP2 (82)
  56 #define CSB_CC_TRANSLATION_DUP3 (84)
  57 #define CSB_CC_TRANSLATION_DUP4 (86)
  58 #define CSB_CC_TRANSLATION_DUP5 (92)
  59 #define CSB_CC_TRANSLATION_DUP6 (94)
  60 #define CSB_CC_PROTECTION_DUP1  (81)
  61 #define CSB_CC_PROTECTION_DUP2  (83)
  62 #define CSB_CC_PROTECTION_DUP3  (85)
  63 #define CSB_CC_PROTECTION_DUP4  (87)
  64 #define CSB_CC_PROTECTION_DUP5  (93)
  65 #define CSB_CC_PROTECTION_DUP6  (95)
  66 #define CSB_CC_RD_EXTERNAL_DUP1 (89)
  67 #define CSB_CC_RD_EXTERNAL_DUP2 (90)
  68 #define CSB_CC_RD_EXTERNAL_DUP3 (91)
  69 /* These are specific to NX */
  70 /* 842 codes */
  71 #define CSB_CC_TPBC_GT_SPBC     (64) /* no error, but >1 comp ratio */
  72 #define CSB_CC_CRC_MISMATCH     (65) /* decomp crc mismatch */
  73 #define CSB_CC_TEMPL_INVALID    (66) /* decomp invalid template value */
  74 #define CSB_CC_TEMPL_OVERFLOW   (67) /* decomp template shows data after end */
  75 /* sym crypt codes */
  76 #define CSB_CC_DECRYPT_OVERFLOW (64)
  77 /* asym crypt codes */
  78 #define CSB_CC_MINV_OVERFLOW    (128)
  79 /* These are reserved for hypervisor use */
  80 #define CSB_CC_HYP_RESERVE_START        (240)
  81 #define CSB_CC_HYP_RESERVE_END          (253)
  82 #define CSB_CC_HYP_NO_HW                (254)
  83 #define CSB_CC_HYP_HANG_ABORTED         (255)
  84
  85 /* CCB Completion Modes (CM) for 842
  86  * NX P8 workbook, section 4.3, figure 4-5
  87  * "CRB Details - Normal Cop_Req (CL=00, C=1)"
  88  */
  89 #define CCB_CM_EXTRA_WRITE      (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_STORE)
  90 #define CCB_CM_INTERRUPT        (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_INTERRUPT)
  91
  92 #define LEN_ON_SIZE(pa, size)   ((size) - ((pa) & ((size) - 1)))
  93 #define LEN_ON_PAGE(pa)         LEN_ON_SIZE(pa, PAGE_SIZE)
  94
  95 static inline unsigned long nx842_get_pa(void *addr)
  96 {
  97         if (!is_vmalloc_addr(addr))
  98                 return __pa(addr);
  99
 100         return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);
 101 }
 102
 103 /* Get/Set bit fields */
 104 #define MASK_LSH(m)             (__builtin_ffsl(m) - 1)
 105 #define GET_FIELD(v, m)         (((v) & (m)) >> MASK_LSH(m))
 106 #define SET_FIELD(v, m, val)    (((v) & ~(m)) | (((val) << MASK_LSH(m)) & (m)))
 107
 108 /**
 109  * This provides the driver's constraints.  Different nx842 implementations
 110  * may have varying requirements.  The constraints are:
 111  *   @alignment:        All buffers should be aligned to this
 112  *   @multiple:         All buffer lengths should be a multiple of this
 113  *   @minimum:          Buffer lengths must not be less than this amount
 114  *   @maximum:          Buffer lengths must not be more than this amount
 115  *
 116  * The constraints apply to all buffers and lengths, both input and output,
 117  * for both compression and decompression, except for the minimum which
 118  * only applies to compression input and decompression output; the
 119  * compressed data can be less than the minimum constraint.  It can be
 120  * assumed that compressed data will always adhere to the multiple
 121  * constraint.
 122  *
 123  * The driver may succeed even if these constraints are violated;
 124  * however the driver can return failure or suffer reduced performance
 125  * if any constraint is not met.
 126  */
 127 struct nx842_constraints {
 128         int alignment;
 129         int multiple;
 130         int minimum;
 131         int maximum;
 132 };
 133
 134 struct nx842_driver {
 135         char *name;
 136         struct module *owner;
 137         size_t workmem_size;
 138
 139         struct nx842_constraints *constraints;
 140
 141         int (*compress)(const unsigned char *in, unsigned int in_len,
 142                         unsigned char *out, unsigned int *out_len,
 143                         void *wrkmem);
 144         int (*decompress)(const unsigned char *in, unsigned int in_len,
 145                           unsigned char *out, unsigned int *out_len,
 146                           void *wrkmem);
 147 };
 148
 149 struct nx842_crypto_header_group {
 150         __be16 padding;                 /* unused bytes at start of group */
 151         __be32 compressed_length;       /* compressed bytes in group */
 152         __be32 uncompressed_length;     /* bytes after decompression */
 153 } __packed;
 154
 155 struct nx842_crypto_header {
 156         __be16 magic;           /* NX842_CRYPTO_MAGIC */
 157         __be16 ignore;          /* decompressed end bytes to ignore */
 158         u8 groups;              /* total groups in this header */
 159         struct nx842_crypto_header_group group[];
 160 } __packed;
 161
 162 #define NX842_CRYPTO_GROUP_MAX  (0x20)
 163
 164 struct nx842_crypto_ctx {
 165         spinlock_t lock;
 166
 167         u8 *wmem;
 168         u8 *sbounce, *dbounce;
 169
 170         struct nx842_crypto_header header;
 171         struct nx842_crypto_header_group group[NX842_CRYPTO_GROUP_MAX];
 172
 173         struct nx842_driver *driver;
 174 };
 175
 176 int nx842_crypto_init(struct crypto_tfm *tfm, struct nx842_driver *driver);
 177 void nx842_crypto_exit(struct crypto_tfm *tfm);
 178 int nx842_crypto_compress(struct crypto_tfm *tfm,
 179                           const u8 *src, unsigned int slen,
 180                           u8 *dst, unsigned int *dlen);
 181 int nx842_crypto_decompress(struct crypto_tfm *tfm,
 182                             const u8 *src, unsigned int slen,
 183                             u8 *dst, unsigned int *dlen);
 184
 185 #endif /* __NX_842_H__ */