x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / hwtracing / coresight / coresight-tpiu.c
blob0673baf0f2f5b93bbe9c14c2a7c9a7d390f338b7
1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
3 * Description: CoreSight Trace Port Interface Unit driver
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/io.h>
19 #include <linux/err.h>
20 #include <linux/slab.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/coresight.h>
23 #include <linux/amba/bus.h>
24 #include <linux/clk.h>
26 #include "coresight-priv.h"
28 #define TPIU_SUPP_PORTSZ 0x000
29 #define TPIU_CURR_PORTSZ 0x004
30 #define TPIU_SUPP_TRIGMODES 0x100
31 #define TPIU_TRIG_CNTRVAL 0x104
32 #define TPIU_TRIG_MULT 0x108
33 #define TPIU_SUPP_TESTPATM 0x200
34 #define TPIU_CURR_TESTPATM 0x204
35 #define TPIU_TEST_PATREPCNTR 0x208
36 #define TPIU_FFSR 0x300
37 #define TPIU_FFCR 0x304
38 #define TPIU_FSYNC_CNTR 0x308
39 #define TPIU_EXTCTL_INPORT 0x400
40 #define TPIU_EXTCTL_OUTPORT 0x404
41 #define TPIU_ITTRFLINACK 0xee4
42 #define TPIU_ITTRFLIN 0xee8
43 #define TPIU_ITATBDATA0 0xeec
44 #define TPIU_ITATBCTR2 0xef0
45 #define TPIU_ITATBCTR1 0xef4
46 #define TPIU_ITATBCTR0 0xef8
48 /** register definition **/
49 /* FFCR - 0x304 */
50 #define FFCR_FON_MAN BIT(6)
52 /**
53 * @base: memory mapped base address for this component.
54 * @dev: the device entity associated to this component.
55 * @atclk: optional clock for the core parts of the TPIU.
56 * @csdev: component vitals needed by the framework.
58 struct tpiu_drvdata {
59 void __iomem *base;
60 struct device *dev;
61 struct clk *atclk;
62 struct coresight_device *csdev;
65 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
67 CS_UNLOCK(drvdata->base);
69 /* TODO: fill this up */
71 CS_LOCK(drvdata->base);
74 static int tpiu_enable(struct coresight_device *csdev, u32 mode)
76 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
78 tpiu_enable_hw(drvdata);
80 dev_info(drvdata->dev, "TPIU enabled\n");
81 return 0;
84 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
86 CS_UNLOCK(drvdata->base);
88 /* Clear formatter controle reg. */
89 writel_relaxed(0x0, drvdata->base + TPIU_FFCR);
90 /* Generate manual flush */
91 writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
93 CS_LOCK(drvdata->base);
96 static void tpiu_disable(struct coresight_device *csdev)
98 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
100 tpiu_disable_hw(drvdata);
102 dev_info(drvdata->dev, "TPIU disabled\n");
105 static const struct coresight_ops_sink tpiu_sink_ops = {
106 .enable = tpiu_enable,
107 .disable = tpiu_disable,
110 static const struct coresight_ops tpiu_cs_ops = {
111 .sink_ops = &tpiu_sink_ops,
114 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
116 int ret;
117 void __iomem *base;
118 struct device *dev = &adev->dev;
119 struct coresight_platform_data *pdata = NULL;
120 struct tpiu_drvdata *drvdata;
121 struct resource *res = &adev->res;
122 struct coresight_desc desc = { 0 };
123 struct device_node *np = adev->dev.of_node;
125 if (np) {
126 pdata = of_get_coresight_platform_data(dev, np);
127 if (IS_ERR(pdata))
128 return PTR_ERR(pdata);
129 adev->dev.platform_data = pdata;
132 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
133 if (!drvdata)
134 return -ENOMEM;
136 drvdata->dev = &adev->dev;
137 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
138 if (!IS_ERR(drvdata->atclk)) {
139 ret = clk_prepare_enable(drvdata->atclk);
140 if (ret)
141 return ret;
143 dev_set_drvdata(dev, drvdata);
145 /* Validity for the resource is already checked by the AMBA core */
146 base = devm_ioremap_resource(dev, res);
147 if (IS_ERR(base))
148 return PTR_ERR(base);
150 drvdata->base = base;
152 /* Disable tpiu to support older devices */
153 tpiu_disable_hw(drvdata);
155 pm_runtime_put(&adev->dev);
157 desc.type = CORESIGHT_DEV_TYPE_SINK;
158 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
159 desc.ops = &tpiu_cs_ops;
160 desc.pdata = pdata;
161 desc.dev = dev;
162 drvdata->csdev = coresight_register(&desc);
163 if (IS_ERR(drvdata->csdev))
164 return PTR_ERR(drvdata->csdev);
166 return 0;
169 #ifdef CONFIG_PM
170 static int tpiu_runtime_suspend(struct device *dev)
172 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
174 if (drvdata && !IS_ERR(drvdata->atclk))
175 clk_disable_unprepare(drvdata->atclk);
177 return 0;
180 static int tpiu_runtime_resume(struct device *dev)
182 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
184 if (drvdata && !IS_ERR(drvdata->atclk))
185 clk_prepare_enable(drvdata->atclk);
187 return 0;
189 #endif
191 static const struct dev_pm_ops tpiu_dev_pm_ops = {
192 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
195 static struct amba_id tpiu_ids[] = {
197 .id = 0x0003b912,
198 .mask = 0x0003ffff,
201 .id = 0x0004b912,
202 .mask = 0x0007ffff,
204 { 0, 0},
207 static struct amba_driver tpiu_driver = {
208 .drv = {
209 .name = "coresight-tpiu",
210 .owner = THIS_MODULE,
211 .pm = &tpiu_dev_pm_ops,
212 .suppress_bind_attrs = true,
214 .probe = tpiu_probe,
215 .id_table = tpiu_ids,
217 builtin_amba_driver(tpiu_driver);