x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / media / platform / mtk-vcodec / mtk_vcodec_enc_drv.c
blobaa81f3ce94632575af2ee5cd212d8fd568088c99
1 /*
2 * Copyright (c) 2016 MediaTek Inc.
3 * Author: PC Chen <pc.chen@mediatek.com>
4 * Tiffany Lin <tiffany.lin@mediatek.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/slab.h>
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/module.h>
20 #include <linux/of_device.h>
21 #include <linux/of.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-dma-contig.h>
25 #include <linux/pm_runtime.h>
27 #include "mtk_vcodec_drv.h"
28 #include "mtk_vcodec_enc.h"
29 #include "mtk_vcodec_enc_pm.h"
30 #include "mtk_vcodec_intr.h"
31 #include "mtk_vcodec_util.h"
32 #include "mtk_vpu.h"
34 module_param(mtk_v4l2_dbg_level, int, S_IRUGO | S_IWUSR);
35 module_param(mtk_vcodec_dbg, bool, S_IRUGO | S_IWUSR);
37 /* Wake up context wait_queue */
38 static void wake_up_ctx(struct mtk_vcodec_ctx *ctx, unsigned int reason)
40 ctx->int_cond = 1;
41 ctx->int_type = reason;
42 wake_up_interruptible(&ctx->queue);
45 static void clean_irq_status(unsigned int irq_status, void __iomem *addr)
47 if (irq_status & MTK_VENC_IRQ_STATUS_PAUSE)
48 writel(MTK_VENC_IRQ_STATUS_PAUSE, addr);
50 if (irq_status & MTK_VENC_IRQ_STATUS_SWITCH)
51 writel(MTK_VENC_IRQ_STATUS_SWITCH, addr);
53 if (irq_status & MTK_VENC_IRQ_STATUS_DRAM)
54 writel(MTK_VENC_IRQ_STATUS_DRAM, addr);
56 if (irq_status & MTK_VENC_IRQ_STATUS_SPS)
57 writel(MTK_VENC_IRQ_STATUS_SPS, addr);
59 if (irq_status & MTK_VENC_IRQ_STATUS_PPS)
60 writel(MTK_VENC_IRQ_STATUS_PPS, addr);
62 if (irq_status & MTK_VENC_IRQ_STATUS_FRM)
63 writel(MTK_VENC_IRQ_STATUS_FRM, addr);
66 static irqreturn_t mtk_vcodec_enc_irq_handler(int irq, void *priv)
68 struct mtk_vcodec_dev *dev = priv;
69 struct mtk_vcodec_ctx *ctx;
70 unsigned long flags;
71 void __iomem *addr;
73 spin_lock_irqsave(&dev->irqlock, flags);
74 ctx = dev->curr_ctx;
75 spin_unlock_irqrestore(&dev->irqlock, flags);
77 mtk_v4l2_debug(1, "id=%d", ctx->id);
78 addr = dev->reg_base[VENC_SYS] + MTK_VENC_IRQ_ACK_OFFSET;
80 ctx->irq_status = readl(dev->reg_base[VENC_SYS] +
81 (MTK_VENC_IRQ_STATUS_OFFSET));
83 clean_irq_status(ctx->irq_status, addr);
85 wake_up_ctx(ctx, MTK_INST_IRQ_RECEIVED);
86 return IRQ_HANDLED;
89 static irqreturn_t mtk_vcodec_enc_lt_irq_handler(int irq, void *priv)
91 struct mtk_vcodec_dev *dev = priv;
92 struct mtk_vcodec_ctx *ctx;
93 unsigned long flags;
94 void __iomem *addr;
96 spin_lock_irqsave(&dev->irqlock, flags);
97 ctx = dev->curr_ctx;
98 spin_unlock_irqrestore(&dev->irqlock, flags);
100 mtk_v4l2_debug(1, "id=%d", ctx->id);
101 ctx->irq_status = readl(dev->reg_base[VENC_LT_SYS] +
102 (MTK_VENC_IRQ_STATUS_OFFSET));
104 addr = dev->reg_base[VENC_LT_SYS] + MTK_VENC_IRQ_ACK_OFFSET;
106 clean_irq_status(ctx->irq_status, addr);
108 wake_up_ctx(ctx, MTK_INST_IRQ_RECEIVED);
109 return IRQ_HANDLED;
112 static void mtk_vcodec_enc_reset_handler(void *priv)
114 struct mtk_vcodec_dev *dev = priv;
115 struct mtk_vcodec_ctx *ctx;
117 mtk_v4l2_debug(0, "Watchdog timeout!!");
119 mutex_lock(&dev->dev_mutex);
120 list_for_each_entry(ctx, &dev->ctx_list, list) {
121 ctx->state = MTK_STATE_ABORT;
122 mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT",
123 ctx->id);
125 mutex_unlock(&dev->dev_mutex);
128 static int fops_vcodec_open(struct file *file)
130 struct mtk_vcodec_dev *dev = video_drvdata(file);
131 struct mtk_vcodec_ctx *ctx = NULL;
132 int ret = 0;
134 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
135 if (!ctx)
136 return -ENOMEM;
138 mutex_lock(&dev->dev_mutex);
140 * Use simple counter to uniquely identify this context. Only
141 * used for logging.
143 ctx->id = dev->id_counter++;
144 v4l2_fh_init(&ctx->fh, video_devdata(file));
145 file->private_data = &ctx->fh;
146 v4l2_fh_add(&ctx->fh);
147 INIT_LIST_HEAD(&ctx->list);
148 ctx->dev = dev;
149 init_waitqueue_head(&ctx->queue);
151 ctx->type = MTK_INST_ENCODER;
152 ret = mtk_vcodec_enc_ctrls_setup(ctx);
153 if (ret) {
154 mtk_v4l2_err("Failed to setup controls() (%d)",
155 ret);
156 goto err_ctrls_setup;
158 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev_enc, ctx,
159 &mtk_vcodec_enc_queue_init);
160 if (IS_ERR((__force void *)ctx->m2m_ctx)) {
161 ret = PTR_ERR((__force void *)ctx->m2m_ctx);
162 mtk_v4l2_err("Failed to v4l2_m2m_ctx_init() (%d)",
163 ret);
164 goto err_m2m_ctx_init;
166 mtk_vcodec_enc_set_default_params(ctx);
168 if (v4l2_fh_is_singular(&ctx->fh)) {
170 * vpu_load_firmware checks if it was loaded already and
171 * does nothing in that case
173 ret = vpu_load_firmware(dev->vpu_plat_dev);
174 if (ret < 0) {
176 * Return 0 if downloading firmware successfully,
177 * otherwise it is failed
179 mtk_v4l2_err("vpu_load_firmware failed!");
180 goto err_load_fw;
183 dev->enc_capability =
184 vpu_get_venc_hw_capa(dev->vpu_plat_dev);
185 mtk_v4l2_debug(0, "encoder capability %x", dev->enc_capability);
188 mtk_v4l2_debug(2, "Create instance [%d]@%p m2m_ctx=%p ",
189 ctx->id, ctx, ctx->m2m_ctx);
191 list_add(&ctx->list, &dev->ctx_list);
193 mutex_unlock(&dev->dev_mutex);
194 mtk_v4l2_debug(0, "%s encoder [%d]", dev_name(&dev->plat_dev->dev),
195 ctx->id);
196 return ret;
198 /* Deinit when failure occurred */
199 err_load_fw:
200 v4l2_m2m_ctx_release(ctx->m2m_ctx);
201 err_m2m_ctx_init:
202 v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
203 err_ctrls_setup:
204 v4l2_fh_del(&ctx->fh);
205 v4l2_fh_exit(&ctx->fh);
206 kfree(ctx);
207 mutex_unlock(&dev->dev_mutex);
209 return ret;
212 static int fops_vcodec_release(struct file *file)
214 struct mtk_vcodec_dev *dev = video_drvdata(file);
215 struct mtk_vcodec_ctx *ctx = fh_to_ctx(file->private_data);
217 mtk_v4l2_debug(1, "[%d] encoder", ctx->id);
218 mutex_lock(&dev->dev_mutex);
220 mtk_vcodec_enc_release(ctx);
221 v4l2_fh_del(&ctx->fh);
222 v4l2_fh_exit(&ctx->fh);
223 v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
224 v4l2_m2m_ctx_release(ctx->m2m_ctx);
226 list_del_init(&ctx->list);
227 kfree(ctx);
228 mutex_unlock(&dev->dev_mutex);
229 return 0;
232 static const struct v4l2_file_operations mtk_vcodec_fops = {
233 .owner = THIS_MODULE,
234 .open = fops_vcodec_open,
235 .release = fops_vcodec_release,
236 .poll = v4l2_m2m_fop_poll,
237 .unlocked_ioctl = video_ioctl2,
238 .mmap = v4l2_m2m_fop_mmap,
241 static int mtk_vcodec_probe(struct platform_device *pdev)
243 struct mtk_vcodec_dev *dev;
244 struct video_device *vfd_enc;
245 struct resource *res;
246 int i, j, ret;
248 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
249 if (!dev)
250 return -ENOMEM;
252 INIT_LIST_HEAD(&dev->ctx_list);
253 dev->plat_dev = pdev;
255 dev->vpu_plat_dev = vpu_get_plat_device(dev->plat_dev);
256 if (dev->vpu_plat_dev == NULL) {
257 mtk_v4l2_err("[VPU] vpu device in not ready");
258 return -EPROBE_DEFER;
261 vpu_wdt_reg_handler(dev->vpu_plat_dev, mtk_vcodec_enc_reset_handler,
262 dev, VPU_RST_ENC);
264 ret = mtk_vcodec_init_enc_pm(dev);
265 if (ret < 0) {
266 dev_err(&pdev->dev, "Failed to get mt vcodec clock source!");
267 return ret;
270 for (i = VENC_SYS, j = 0; i < NUM_MAX_VCODEC_REG_BASE; i++, j++) {
271 res = platform_get_resource(pdev, IORESOURCE_MEM, j);
272 if (res == NULL) {
273 dev_err(&pdev->dev, "get memory resource failed.");
274 ret = -ENXIO;
275 goto err_res;
277 dev->reg_base[i] = devm_ioremap_resource(&pdev->dev, res);
278 if (IS_ERR((__force void *)dev->reg_base[i])) {
279 ret = PTR_ERR((__force void *)dev->reg_base[i]);
280 goto err_res;
282 mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[i]);
285 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
286 if (res == NULL) {
287 dev_err(&pdev->dev, "failed to get irq resource");
288 ret = -ENOENT;
289 goto err_res;
292 dev->enc_irq = platform_get_irq(pdev, 0);
293 ret = devm_request_irq(&pdev->dev, dev->enc_irq,
294 mtk_vcodec_enc_irq_handler,
295 0, pdev->name, dev);
296 if (ret) {
297 dev_err(&pdev->dev, "Failed to install dev->enc_irq %d (%d)",
298 dev->enc_irq,
299 ret);
300 ret = -EINVAL;
301 goto err_res;
304 dev->enc_lt_irq = platform_get_irq(pdev, 1);
305 ret = devm_request_irq(&pdev->dev,
306 dev->enc_lt_irq, mtk_vcodec_enc_lt_irq_handler,
307 0, pdev->name, dev);
308 if (ret) {
309 dev_err(&pdev->dev,
310 "Failed to install dev->enc_lt_irq %d (%d)",
311 dev->enc_lt_irq, ret);
312 ret = -EINVAL;
313 goto err_res;
316 disable_irq(dev->enc_irq);
317 disable_irq(dev->enc_lt_irq); /* VENC_LT */
318 mutex_init(&dev->enc_mutex);
319 mutex_init(&dev->dev_mutex);
320 spin_lock_init(&dev->irqlock);
322 snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s",
323 "[MTK_V4L2_VENC]");
325 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
326 if (ret) {
327 mtk_v4l2_err("v4l2_device_register err=%d", ret);
328 goto err_res;
331 init_waitqueue_head(&dev->queue);
333 /* allocate video device for encoder and register it */
334 vfd_enc = video_device_alloc();
335 if (!vfd_enc) {
336 mtk_v4l2_err("Failed to allocate video device");
337 ret = -ENOMEM;
338 goto err_enc_alloc;
340 vfd_enc->fops = &mtk_vcodec_fops;
341 vfd_enc->ioctl_ops = &mtk_venc_ioctl_ops;
342 vfd_enc->release = video_device_release;
343 vfd_enc->lock = &dev->dev_mutex;
344 vfd_enc->v4l2_dev = &dev->v4l2_dev;
345 vfd_enc->vfl_dir = VFL_DIR_M2M;
346 vfd_enc->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE |
347 V4L2_CAP_STREAMING;
349 snprintf(vfd_enc->name, sizeof(vfd_enc->name), "%s",
350 MTK_VCODEC_ENC_NAME);
351 video_set_drvdata(vfd_enc, dev);
352 dev->vfd_enc = vfd_enc;
353 platform_set_drvdata(pdev, dev);
355 dev->m2m_dev_enc = v4l2_m2m_init(&mtk_venc_m2m_ops);
356 if (IS_ERR((__force void *)dev->m2m_dev_enc)) {
357 mtk_v4l2_err("Failed to init mem2mem enc device");
358 ret = PTR_ERR((__force void *)dev->m2m_dev_enc);
359 goto err_enc_mem_init;
362 dev->encode_workqueue =
363 alloc_ordered_workqueue(MTK_VCODEC_ENC_NAME,
364 WQ_MEM_RECLAIM |
365 WQ_FREEZABLE);
366 if (!dev->encode_workqueue) {
367 mtk_v4l2_err("Failed to create encode workqueue");
368 ret = -EINVAL;
369 goto err_event_workq;
372 ret = video_register_device(vfd_enc, VFL_TYPE_GRABBER, 1);
373 if (ret) {
374 mtk_v4l2_err("Failed to register video device");
375 goto err_enc_reg;
378 mtk_v4l2_debug(0, "encoder registered as /dev/video%d",
379 vfd_enc->num);
381 return 0;
383 err_enc_reg:
384 destroy_workqueue(dev->encode_workqueue);
385 err_event_workq:
386 v4l2_m2m_release(dev->m2m_dev_enc);
387 err_enc_mem_init:
388 video_unregister_device(vfd_enc);
389 err_enc_alloc:
390 v4l2_device_unregister(&dev->v4l2_dev);
391 err_res:
392 mtk_vcodec_release_enc_pm(dev);
393 return ret;
396 static const struct of_device_id mtk_vcodec_enc_match[] = {
397 {.compatible = "mediatek,mt8173-vcodec-enc",},
400 MODULE_DEVICE_TABLE(of, mtk_vcodec_enc_match);
402 static int mtk_vcodec_enc_remove(struct platform_device *pdev)
404 struct mtk_vcodec_dev *dev = platform_get_drvdata(pdev);
406 mtk_v4l2_debug_enter();
407 flush_workqueue(dev->encode_workqueue);
408 destroy_workqueue(dev->encode_workqueue);
409 if (dev->m2m_dev_enc)
410 v4l2_m2m_release(dev->m2m_dev_enc);
412 if (dev->vfd_enc)
413 video_unregister_device(dev->vfd_enc);
415 v4l2_device_unregister(&dev->v4l2_dev);
416 mtk_vcodec_release_enc_pm(dev);
417 return 0;
420 static struct platform_driver mtk_vcodec_enc_driver = {
421 .probe = mtk_vcodec_probe,
422 .remove = mtk_vcodec_enc_remove,
423 .driver = {
424 .name = MTK_VCODEC_ENC_NAME,
425 .of_match_table = mtk_vcodec_enc_match,
429 module_platform_driver(mtk_vcodec_enc_driver);
432 MODULE_LICENSE("GPL v2");
433 MODULE_DESCRIPTION("Mediatek video codec V4L2 encoder driver");