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x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / media / tuners / e4000.c
blob564a000f503e02f3f905cac15f2c858f5778903e
1 /*
2 * Elonics E4000 silicon tuner driver
3 *
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21 #include "e4000_priv.h"
22
23 static int e4000_init(struct e4000_dev *dev)
24 {
25 struct i2c_client *client = dev->client;
26 int ret;
27
28 dev_dbg(&client->dev, "\n");
29
30 /* reset */
31 ret = regmap_write(dev->regmap, 0x00, 0x01);
32 if (ret)
33 goto err;
34
35 /* disable output clock */
36 ret = regmap_write(dev->regmap, 0x06, 0x00);
37 if (ret)
38 goto err;
39
40 ret = regmap_write(dev->regmap, 0x7a, 0x96);
41 if (ret)
42 goto err;
43
44 /* configure gains */
45 ret = regmap_bulk_write(dev->regmap, 0x7e, "\x01\xfe", 2);
46 if (ret)
47 goto err;
48
49 ret = regmap_write(dev->regmap, 0x82, 0x00);
50 if (ret)
51 goto err;
52
53 ret = regmap_write(dev->regmap, 0x24, 0x05);
54 if (ret)
55 goto err;
56
57 ret = regmap_bulk_write(dev->regmap, 0x87, "\x20\x01", 2);
58 if (ret)
59 goto err;
60
61 ret = regmap_bulk_write(dev->regmap, 0x9f, "\x7f\x07", 2);
62 if (ret)
63 goto err;
64
65 /* DC offset control */
66 ret = regmap_write(dev->regmap, 0x2d, 0x1f);
67 if (ret)
68 goto err;
69
70 ret = regmap_bulk_write(dev->regmap, 0x70, "\x01\x01", 2);
71 if (ret)
72 goto err;
73
74 /* gain control */
75 ret = regmap_write(dev->regmap, 0x1a, 0x17);
76 if (ret)
77 goto err;
78
79 ret = regmap_write(dev->regmap, 0x1f, 0x1a);
80 if (ret)
81 goto err;
82
83 dev->active = true;
84
85 return 0;
86 err:
87 dev_dbg(&client->dev, "failed=%d\n", ret);
88 return ret;
89 }
90
91 static int e4000_sleep(struct e4000_dev *dev)
92 {
93 struct i2c_client *client = dev->client;
94 int ret;
95
96 dev_dbg(&client->dev, "\n");
97
98 dev->active = false;
99
100 ret = regmap_write(dev->regmap, 0x00, 0x00);
101 if (ret)
102 goto err;
103
104 return 0;
105 err:
106 dev_dbg(&client->dev, "failed=%d\n", ret);
107 return ret;
108 }
109
110 static int e4000_set_params(struct e4000_dev *dev)
111 {
112 struct i2c_client *client = dev->client;
113 int ret, i;
114 unsigned int div_n, k, k_cw, div_out;
115 u64 f_vco;
116 u8 buf[5], i_data[4], q_data[4];
117
118 if (!dev->active) {
119 dev_dbg(&client->dev, "tuner is sleeping\n");
120 return 0;
121 }
122
123 /* gain control manual */
124 ret = regmap_write(dev->regmap, 0x1a, 0x00);
125 if (ret)
126 goto err;
127
128 /*
129 * Fractional-N synthesizer
130 *
131 * +----------------------------+
132 * v |
133 * Fref +----+ +-------+ +------+ +---+
134 * ------> | PD | --> | VCO | ------> | /N.F | <-- | K |
135 * +----+ +-------+ +------+ +---+
136 * |
137 * |
138 * v
139 * +-------+ Fout
140 * | /Rout | ------>
141 * +-------+
142 */
143 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
144 if (dev->f_frequency <= e4000_pll_lut[i].freq)
145 break;
146 }
147 if (i == ARRAY_SIZE(e4000_pll_lut)) {
148 ret = -EINVAL;
149 goto err;
150 }
151
152 #define F_REF dev->clk
153 div_out = e4000_pll_lut[i].div_out;
154 f_vco = (u64) dev->f_frequency * div_out;
155 /* calculate PLL integer and fractional control word */
156 div_n = div_u64_rem(f_vco, F_REF, &k);
157 k_cw = div_u64((u64) k * 0x10000, F_REF);
158
159 dev_dbg(&client->dev,
160 "frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_n=%u k=%u k_cw=%04x div_out=%u\n",
161 dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_n, k,
162 k_cw, div_out);
163
164 buf[0] = div_n;
165 buf[1] = (k_cw >> 0) & 0xff;
166 buf[2] = (k_cw >> 8) & 0xff;
167 buf[3] = 0x00;
168 buf[4] = e4000_pll_lut[i].div_out_reg;
169 ret = regmap_bulk_write(dev->regmap, 0x09, buf, 5);
170 if (ret)
171 goto err;
172
173 /* LNA filter (RF filter) */
174 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
175 if (dev->f_frequency <= e400_lna_filter_lut[i].freq)
176 break;
177 }
178 if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
179 ret = -EINVAL;
180 goto err;
181 }
182
183 ret = regmap_write(dev->regmap, 0x10, e400_lna_filter_lut[i].val);
184 if (ret)
185 goto err;
186
187 /* IF filters */
188 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
189 if (dev->f_bandwidth <= e4000_if_filter_lut[i].freq)
190 break;
191 }
192 if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
193 ret = -EINVAL;
194 goto err;
195 }
196
197 buf[0] = e4000_if_filter_lut[i].reg11_val;
198 buf[1] = e4000_if_filter_lut[i].reg12_val;
199
200 ret = regmap_bulk_write(dev->regmap, 0x11, buf, 2);
201 if (ret)
202 goto err;
203
204 /* frequency band */
205 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
206 if (dev->f_frequency <= e4000_band_lut[i].freq)
207 break;
208 }
209 if (i == ARRAY_SIZE(e4000_band_lut)) {
210 ret = -EINVAL;
211 goto err;
212 }
213
214 ret = regmap_write(dev->regmap, 0x07, e4000_band_lut[i].reg07_val);
215 if (ret)
216 goto err;
217
218 ret = regmap_write(dev->regmap, 0x78, e4000_band_lut[i].reg78_val);
219 if (ret)
220 goto err;
221
222 /* DC offset */
223 for (i = 0; i < 4; i++) {
224 if (i == 0)
225 ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7e\x24", 3);
226 else if (i == 1)
227 ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7f", 2);
228 else if (i == 2)
229 ret = regmap_bulk_write(dev->regmap, 0x15, "\x01", 1);
230 else
231 ret = regmap_bulk_write(dev->regmap, 0x16, "\x7e", 1);
232
233 if (ret)
234 goto err;
235
236 ret = regmap_write(dev->regmap, 0x29, 0x01);
237 if (ret)
238 goto err;
239
240 ret = regmap_bulk_read(dev->regmap, 0x2a, buf, 3);
241 if (ret)
242 goto err;
243
244 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
245 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
246 }
247
248 swap(q_data[2], q_data[3]);
249 swap(i_data[2], i_data[3]);
250
251 ret = regmap_bulk_write(dev->regmap, 0x50, q_data, 4);
252 if (ret)
253 goto err;
254
255 ret = regmap_bulk_write(dev->regmap, 0x60, i_data, 4);
256 if (ret)
257 goto err;
258
259 /* gain control auto */
260 ret = regmap_write(dev->regmap, 0x1a, 0x17);
261 if (ret)
262 goto err;
263
264 return 0;
265 err:
266 dev_dbg(&client->dev, "failed=%d\n", ret);
267 return ret;
268 }
269
270 /*
271 * V4L2 API
272 */
273 #if IS_ENABLED(CONFIG_VIDEO_V4L2)
274 static const struct v4l2_frequency_band bands[] = {
275 {
276 .type = V4L2_TUNER_RF,
277 .index = 0,
278 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
279 .rangelow = 59000000,
280 .rangehigh = 1105000000,
281 },
282 {
283 .type = V4L2_TUNER_RF,
284 .index = 1,
285 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
286 .rangelow = 1249000000,
287 .rangehigh = 2208000000UL,
288 },
289 };
290
291 static inline struct e4000_dev *e4000_subdev_to_dev(struct v4l2_subdev *sd)
292 {
293 return container_of(sd, struct e4000_dev, sd);
294 }
295
296 static int e4000_s_power(struct v4l2_subdev *sd, int on)
297 {
298 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
299 struct i2c_client *client = dev->client;
300 int ret;
301
302 dev_dbg(&client->dev, "on=%d\n", on);
303
304 if (on)
305 ret = e4000_init(dev);
306 else
307 ret = e4000_sleep(dev);
308 if (ret)
309 return ret;
310
311 return e4000_set_params(dev);
312 }
313
314 static const struct v4l2_subdev_core_ops e4000_subdev_core_ops = {
315 .s_power = e4000_s_power,
316 };
317
318 static int e4000_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
319 {
320 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
321 struct i2c_client *client = dev->client;
322
323 dev_dbg(&client->dev, "index=%d\n", v->index);
324
325 strlcpy(v->name, "Elonics E4000", sizeof(v->name));
326 v->type = V4L2_TUNER_RF;
327 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
328 v->rangelow = bands[0].rangelow;
329 v->rangehigh = bands[1].rangehigh;
330 return 0;
331 }
332
333 static int e4000_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
334 {
335 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
336 struct i2c_client *client = dev->client;
337
338 dev_dbg(&client->dev, "index=%d\n", v->index);
339 return 0;
340 }
341
342 static int e4000_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
343 {
344 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
345 struct i2c_client *client = dev->client;
346
347 dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
348 f->frequency = dev->f_frequency;
349 return 0;
350 }
351
352 static int e4000_s_frequency(struct v4l2_subdev *sd,
353 const struct v4l2_frequency *f)
354 {
355 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
356 struct i2c_client *client = dev->client;
357
358 dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
359 f->tuner, f->type, f->frequency);
360
361 dev->f_frequency = clamp_t(unsigned int, f->frequency,
362 bands[0].rangelow, bands[1].rangehigh);
363 return e4000_set_params(dev);
364 }
365
366 static int e4000_enum_freq_bands(struct v4l2_subdev *sd,
367 struct v4l2_frequency_band *band)
368 {
369 struct e4000_dev *dev = e4000_subdev_to_dev(sd);
370 struct i2c_client *client = dev->client;
371
372 dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
373 band->tuner, band->type, band->index);
374
375 if (band->index >= ARRAY_SIZE(bands))
376 return -EINVAL;
377
378 band->capability = bands[band->index].capability;
379 band->rangelow = bands[band->index].rangelow;
380 band->rangehigh = bands[band->index].rangehigh;
381 return 0;
382 }
383
384 static const struct v4l2_subdev_tuner_ops e4000_subdev_tuner_ops = {
385 .g_tuner = e4000_g_tuner,
386 .s_tuner = e4000_s_tuner,
387 .g_frequency = e4000_g_frequency,
388 .s_frequency = e4000_s_frequency,
389 .enum_freq_bands = e4000_enum_freq_bands,
390 };
391
392 static const struct v4l2_subdev_ops e4000_subdev_ops = {
393 .core = &e4000_subdev_core_ops,
394 .tuner = &e4000_subdev_tuner_ops,
395 };
396
397 static int e4000_set_lna_gain(struct dvb_frontend *fe)
398 {
399 struct e4000_dev *dev = fe->tuner_priv;
400 struct i2c_client *client = dev->client;
401 int ret;
402 u8 u8tmp;
403
404 dev_dbg(&client->dev, "lna auto=%d->%d val=%d->%d\n",
405 dev->lna_gain_auto->cur.val, dev->lna_gain_auto->val,
406 dev->lna_gain->cur.val, dev->lna_gain->val);
407
408 if (dev->lna_gain_auto->val && dev->if_gain_auto->cur.val)
409 u8tmp = 0x17;
410 else if (dev->lna_gain_auto->val)
411 u8tmp = 0x19;
412 else if (dev->if_gain_auto->cur.val)
413 u8tmp = 0x16;
414 else
415 u8tmp = 0x10;
416
417 ret = regmap_write(dev->regmap, 0x1a, u8tmp);
418 if (ret)
419 goto err;
420
421 if (dev->lna_gain_auto->val == false) {
422 ret = regmap_write(dev->regmap, 0x14, dev->lna_gain->val);
423 if (ret)
424 goto err;
425 }
426
427 return 0;
428 err:
429 dev_dbg(&client->dev, "failed=%d\n", ret);
430 return ret;
431 }
432
433 static int e4000_set_mixer_gain(struct dvb_frontend *fe)
434 {
435 struct e4000_dev *dev = fe->tuner_priv;
436 struct i2c_client *client = dev->client;
437 int ret;
438 u8 u8tmp;
439
440 dev_dbg(&client->dev, "mixer auto=%d->%d val=%d->%d\n",
441 dev->mixer_gain_auto->cur.val, dev->mixer_gain_auto->val,
442 dev->mixer_gain->cur.val, dev->mixer_gain->val);
443
444 if (dev->mixer_gain_auto->val)
445 u8tmp = 0x15;
446 else
447 u8tmp = 0x14;
448
449 ret = regmap_write(dev->regmap, 0x20, u8tmp);
450 if (ret)
451 goto err;
452
453 if (dev->mixer_gain_auto->val == false) {
454 ret = regmap_write(dev->regmap, 0x15, dev->mixer_gain->val);
455 if (ret)
456 goto err;
457 }
458
459 return 0;
460 err:
461 dev_dbg(&client->dev, "failed=%d\n", ret);
462 return ret;
463 }
464
465 static int e4000_set_if_gain(struct dvb_frontend *fe)
466 {
467 struct e4000_dev *dev = fe->tuner_priv;
468 struct i2c_client *client = dev->client;
469 int ret;
470 u8 buf[2];
471 u8 u8tmp;
472
473 dev_dbg(&client->dev, "if auto=%d->%d val=%d->%d\n",
474 dev->if_gain_auto->cur.val, dev->if_gain_auto->val,
475 dev->if_gain->cur.val, dev->if_gain->val);
476
477 if (dev->if_gain_auto->val && dev->lna_gain_auto->cur.val)
478 u8tmp = 0x17;
479 else if (dev->lna_gain_auto->cur.val)
480 u8tmp = 0x19;
481 else if (dev->if_gain_auto->val)
482 u8tmp = 0x16;
483 else
484 u8tmp = 0x10;
485
486 ret = regmap_write(dev->regmap, 0x1a, u8tmp);
487 if (ret)
488 goto err;
489
490 if (dev->if_gain_auto->val == false) {
491 buf[0] = e4000_if_gain_lut[dev->if_gain->val].reg16_val;
492 buf[1] = e4000_if_gain_lut[dev->if_gain->val].reg17_val;
493 ret = regmap_bulk_write(dev->regmap, 0x16, buf, 2);
494 if (ret)
495 goto err;
496 }
497
498 return 0;
499 err:
500 dev_dbg(&client->dev, "failed=%d\n", ret);
501 return ret;
502 }
503
504 static int e4000_pll_lock(struct dvb_frontend *fe)
505 {
506 struct e4000_dev *dev = fe->tuner_priv;
507 struct i2c_client *client = dev->client;
508 int ret;
509 unsigned int uitmp;
510
511 ret = regmap_read(dev->regmap, 0x07, &uitmp);
512 if (ret)
513 goto err;
514
515 dev->pll_lock->val = (uitmp & 0x01);
516
517 return 0;
518 err:
519 dev_dbg(&client->dev, "failed=%d\n", ret);
520 return ret;
521 }
522
523 static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
524 {
525 struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
526 struct i2c_client *client = dev->client;
527 int ret;
528
529 if (!dev->active)
530 return 0;
531
532 switch (ctrl->id) {
533 case V4L2_CID_RF_TUNER_PLL_LOCK:
534 ret = e4000_pll_lock(dev->fe);
535 break;
536 default:
537 dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
538 ctrl->id, ctrl->name);
539 ret = -EINVAL;
540 }
541
542 return ret;
543 }
544
545 static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
546 {
547 struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
548 struct i2c_client *client = dev->client;
549 int ret;
550
551 if (!dev->active)
552 return 0;
553
554 switch (ctrl->id) {
555 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
556 case V4L2_CID_RF_TUNER_BANDWIDTH:
557 /*
558 * TODO: Auto logic does not work 100% correctly as tuner driver
559 * do not have information to calculate maximum suitable
560 * bandwidth. Calculating it is responsible of master driver.
561 */
562 dev->f_bandwidth = dev->bandwidth->val;
563 ret = e4000_set_params(dev);
564 break;
565 case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
566 case V4L2_CID_RF_TUNER_LNA_GAIN:
567 ret = e4000_set_lna_gain(dev->fe);
568 break;
569 case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
570 case V4L2_CID_RF_TUNER_MIXER_GAIN:
571 ret = e4000_set_mixer_gain(dev->fe);
572 break;
573 case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
574 case V4L2_CID_RF_TUNER_IF_GAIN:
575 ret = e4000_set_if_gain(dev->fe);
576 break;
577 default:
578 dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
579 ctrl->id, ctrl->name);
580 ret = -EINVAL;
581 }
582
583 return ret;
584 }
585
586 static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
587 .g_volatile_ctrl = e4000_g_volatile_ctrl,
588 .s_ctrl = e4000_s_ctrl,
589 };
590 #endif
591
592 /*
593 * DVB API
594 */
595 static int e4000_dvb_set_params(struct dvb_frontend *fe)
596 {
597 struct e4000_dev *dev = fe->tuner_priv;
598 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
599
600 dev->f_frequency = c->frequency;
601 dev->f_bandwidth = c->bandwidth_hz;
602 return e4000_set_params(dev);
603 }
604
605 static int e4000_dvb_init(struct dvb_frontend *fe)
606 {
607 return e4000_init(fe->tuner_priv);
608 }
609
610 static int e4000_dvb_sleep(struct dvb_frontend *fe)
611 {
612 return e4000_sleep(fe->tuner_priv);
613 }
614
615 static int e4000_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
616 {
617 *frequency = 0; /* Zero-IF */
618 return 0;
619 }
620
621 static const struct dvb_tuner_ops e4000_dvb_tuner_ops = {
622 .info = {
623 .name = "Elonics E4000",
624 .frequency_min = 174000000,
625 .frequency_max = 862000000,
626 },
627
628 .init = e4000_dvb_init,
629 .sleep = e4000_dvb_sleep,
630 .set_params = e4000_dvb_set_params,
631
632 .get_if_frequency = e4000_dvb_get_if_frequency,
633 };
634
635 static int e4000_probe(struct i2c_client *client,
636 const struct i2c_device_id *id)
637 {
638 struct e4000_dev *dev;
639 struct e4000_config *cfg = client->dev.platform_data;
640 struct dvb_frontend *fe = cfg->fe;
641 int ret;
642 unsigned int uitmp;
643 static const struct regmap_config regmap_config = {
644 .reg_bits = 8,
645 .val_bits = 8,
646 };
647
648 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
649 if (!dev) {
650 ret = -ENOMEM;
651 goto err;
652 }
653
654 dev->clk = cfg->clock;
655 dev->client = client;
656 dev->fe = cfg->fe;
657 dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
658 if (IS_ERR(dev->regmap)) {
659 ret = PTR_ERR(dev->regmap);
660 goto err_kfree;
661 }
662
663 /* check if the tuner is there */
664 ret = regmap_read(dev->regmap, 0x02, &uitmp);
665 if (ret)
666 goto err_kfree;
667
668 dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
669
670 if (uitmp != 0x40) {
671 ret = -ENODEV;
672 goto err_kfree;
673 }
674
675 /* put sleep as chip seems to be in normal mode by default */
676 ret = regmap_write(dev->regmap, 0x00, 0x00);
677 if (ret)
678 goto err_kfree;
679
680 #if IS_ENABLED(CONFIG_VIDEO_V4L2)
681 /* Register controls */
682 v4l2_ctrl_handler_init(&dev->hdl, 9);
683 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
684 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
685 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
686 V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
687 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
688 dev->lna_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
689 V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
690 dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
691 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
692 v4l2_ctrl_auto_cluster(2, &dev->lna_gain_auto, 0, false);
693 dev->mixer_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
694 V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
695 dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
696 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
697 v4l2_ctrl_auto_cluster(2, &dev->mixer_gain_auto, 0, false);
698 dev->if_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
699 V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
700 dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
701 V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
702 v4l2_ctrl_auto_cluster(2, &dev->if_gain_auto, 0, false);
703 dev->pll_lock = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
704 V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
705 if (dev->hdl.error) {
706 ret = dev->hdl.error;
707 dev_err(&client->dev, "Could not initialize controls\n");
708 v4l2_ctrl_handler_free(&dev->hdl);
709 goto err_kfree;
710 }
711
712 dev->sd.ctrl_handler = &dev->hdl;
713 dev->f_frequency = bands[0].rangelow;
714 dev->f_bandwidth = dev->bandwidth->val;
715 v4l2_i2c_subdev_init(&dev->sd, client, &e4000_subdev_ops);
716 #endif
717 fe->tuner_priv = dev;
718 memcpy(&fe->ops.tuner_ops, &e4000_dvb_tuner_ops,
719 sizeof(fe->ops.tuner_ops));
720 v4l2_set_subdevdata(&dev->sd, client);
721 i2c_set_clientdata(client, &dev->sd);
722
723 dev_info(&client->dev, "Elonics E4000 successfully identified\n");
724 return 0;
725 err_kfree:
726 kfree(dev);
727 err:
728 dev_dbg(&client->dev, "failed=%d\n", ret);
729 return ret;
730 }
731
732 static int e4000_remove(struct i2c_client *client)
733 {
734 struct v4l2_subdev *sd = i2c_get_clientdata(client);
735 struct e4000_dev *dev = container_of(sd, struct e4000_dev, sd);
736
737 dev_dbg(&client->dev, "\n");
738
739 #if IS_ENABLED(CONFIG_VIDEO_V4L2)
740 v4l2_ctrl_handler_free(&dev->hdl);
741 #endif
742 kfree(dev);
743
744 return 0;
745 }
746
747 static const struct i2c_device_id e4000_id_table[] = {
748 {"e4000", 0},
749 {}
750 };
751 MODULE_DEVICE_TABLE(i2c, e4000_id_table);
752
753 static struct i2c_driver e4000_driver = {
754 .driver = {
755 .name = "e4000",
756 .suppress_bind_attrs = true,
757 },
758 .probe = e4000_probe,
759 .remove = e4000_remove,
760 .id_table = e4000_id_table,
761 };
762
763 module_i2c_driver(e4000_driver);
764
765 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
766 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
767 MODULE_LICENSE("GPL");
Linux with added FPC-III support