x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / media / tuners / mc44s803_priv.h
blob52325395dfe7fb147f7d3b8bee972c676606b166
1 /*
2 * Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner
4 * Copyright (c) 2009 Jochen Friedrich <jochen@scram.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #ifndef MC44S803_PRIV_H
19 #define MC44S803_PRIV_H
21 /* This driver is based on the information available in the datasheet
22 http://www.freescale.com/files/rf_if/doc/data_sheet/MC44S803.pdf
24 SPI or I2C Address : 0xc0-0xc6
26 Reg.No | Function
27 -------------------------------------------
28 00 | Power Down
29 01 | Reference Oszillator
30 02 | Reference Dividers
31 03 | Mixer and Reference Buffer
32 04 | Reset/Serial Out
33 05 | LO 1
34 06 | LO 2
35 07 | Circuit Adjust
36 08 | Test
37 09 | Digital Tune
38 0A | LNA AGC
39 0B | Data Register Address
40 0C | Regulator Test
41 0D | VCO Test
42 0E | LNA Gain/Input Power
43 0F | ID Bits
47 #define MC44S803_OSC 26000000 /* 26 MHz */
48 #define MC44S803_IF1 1086000000 /* 1086 MHz */
49 #define MC44S803_IF2 36125000 /* 36.125 MHz */
51 #define MC44S803_REG_POWER 0
52 #define MC44S803_REG_REFOSC 1
53 #define MC44S803_REG_REFDIV 2
54 #define MC44S803_REG_MIXER 3
55 #define MC44S803_REG_RESET 4
56 #define MC44S803_REG_LO1 5
57 #define MC44S803_REG_LO2 6
58 #define MC44S803_REG_CIRCADJ 7
59 #define MC44S803_REG_TEST 8
60 #define MC44S803_REG_DIGTUNE 9
61 #define MC44S803_REG_LNAAGC 0x0A
62 #define MC44S803_REG_DATAREG 0x0B
63 #define MC44S803_REG_REGTEST 0x0C
64 #define MC44S803_REG_VCOTEST 0x0D
65 #define MC44S803_REG_LNAGAIN 0x0E
66 #define MC44S803_REG_ID 0x0F
68 /* Register definitions */
69 #define MC44S803_ADDR 0x0F
70 #define MC44S803_ADDR_S 0
71 /* REG_POWER */
72 #define MC44S803_POWER 0xFFFFF0
73 #define MC44S803_POWER_S 4
74 /* REG_REFOSC */
75 #define MC44S803_REFOSC 0x1FF0
76 #define MC44S803_REFOSC_S 4
77 #define MC44S803_OSCSEL 0x2000
78 #define MC44S803_OSCSEL_S 13
79 /* REG_REFDIV */
80 #define MC44S803_R2 0x1FF0
81 #define MC44S803_R2_S 4
82 #define MC44S803_REFBUF_EN 0x2000
83 #define MC44S803_REFBUF_EN_S 13
84 #define MC44S803_R1 0x7C000
85 #define MC44S803_R1_S 14
86 /* REG_MIXER */
87 #define MC44S803_R3 0x70
88 #define MC44S803_R3_S 4
89 #define MC44S803_MUX3 0x80
90 #define MC44S803_MUX3_S 7
91 #define MC44S803_MUX4 0x100
92 #define MC44S803_MUX4_S 8
93 #define MC44S803_OSC_SCR 0x200
94 #define MC44S803_OSC_SCR_S 9
95 #define MC44S803_TRI_STATE 0x400
96 #define MC44S803_TRI_STATE_S 10
97 #define MC44S803_BUF_GAIN 0x800
98 #define MC44S803_BUF_GAIN_S 11
99 #define MC44S803_BUF_IO 0x1000
100 #define MC44S803_BUF_IO_S 12
101 #define MC44S803_MIXER_RES 0xFE000
102 #define MC44S803_MIXER_RES_S 13
103 /* REG_RESET */
104 #define MC44S803_RS 0x10
105 #define MC44S803_RS_S 4
106 #define MC44S803_SO 0x20
107 #define MC44S803_SO_S 5
108 /* REG_LO1 */
109 #define MC44S803_LO1 0xFFF0
110 #define MC44S803_LO1_S 4
111 /* REG_LO2 */
112 #define MC44S803_LO2 0x7FFF0
113 #define MC44S803_LO2_S 4
114 /* REG_CIRCADJ */
115 #define MC44S803_G1 0x20
116 #define MC44S803_G1_S 5
117 #define MC44S803_G3 0x80
118 #define MC44S803_G3_S 7
119 #define MC44S803_CIRCADJ_RES 0x300
120 #define MC44S803_CIRCADJ_RES_S 8
121 #define MC44S803_G6 0x400
122 #define MC44S803_G6_S 10
123 #define MC44S803_G7 0x800
124 #define MC44S803_G7_S 11
125 #define MC44S803_S1 0x1000
126 #define MC44S803_S1_S 12
127 #define MC44S803_LP 0x7E000
128 #define MC44S803_LP_S 13
129 #define MC44S803_CLRF 0x80000
130 #define MC44S803_CLRF_S 19
131 #define MC44S803_CLIF 0x100000
132 #define MC44S803_CLIF_S 20
133 /* REG_TEST */
134 /* REG_DIGTUNE */
135 #define MC44S803_DA 0xF0
136 #define MC44S803_DA_S 4
137 #define MC44S803_XOD 0x300
138 #define MC44S803_XOD_S 8
139 #define MC44S803_RST 0x10000
140 #define MC44S803_RST_S 16
141 #define MC44S803_LO_REF 0x1FFF00
142 #define MC44S803_LO_REF_S 8
143 #define MC44S803_AT 0x200000
144 #define MC44S803_AT_S 21
145 #define MC44S803_MT 0x400000
146 #define MC44S803_MT_S 22
147 /* REG_LNAAGC */
148 #define MC44S803_G 0x3F0
149 #define MC44S803_G_S 4
150 #define MC44S803_AT1 0x400
151 #define MC44S803_AT1_S 10
152 #define MC44S803_AT2 0x800
153 #define MC44S803_AT2_S 11
154 #define MC44S803_HL_GR_EN 0x8000
155 #define MC44S803_HL_GR_EN_S 15
156 #define MC44S803_AGC_AN_DIG 0x10000
157 #define MC44S803_AGC_AN_DIG_S 16
158 #define MC44S803_ATTEN_EN 0x20000
159 #define MC44S803_ATTEN_EN_S 17
160 #define MC44S803_AGC_READ_EN 0x40000
161 #define MC44S803_AGC_READ_EN_S 18
162 #define MC44S803_LNA0 0x80000
163 #define MC44S803_LNA0_S 19
164 #define MC44S803_AGC_SEL 0x100000
165 #define MC44S803_AGC_SEL_S 20
166 #define MC44S803_AT0 0x200000
167 #define MC44S803_AT0_S 21
168 #define MC44S803_B 0xC00000
169 #define MC44S803_B_S 22
170 /* REG_DATAREG */
171 #define MC44S803_D 0xF0
172 #define MC44S803_D_S 4
173 /* REG_REGTEST */
174 /* REG_VCOTEST */
175 /* REG_LNAGAIN */
176 #define MC44S803_IF_PWR 0x700
177 #define MC44S803_IF_PWR_S 8
178 #define MC44S803_RF_PWR 0x3800
179 #define MC44S803_RF_PWR_S 11
180 #define MC44S803_LNA_GAIN 0xFC000
181 #define MC44S803_LNA_GAIN_S 14
182 /* REG_ID */
183 #define MC44S803_ID 0x3E00
184 #define MC44S803_ID_S 9
186 /* Some macros to read/write fields */
188 /* First shift, then mask */
189 #define MC44S803_REG_SM(_val, _reg) \
190 (((_val) << _reg##_S) & (_reg))
192 /* First mask, then shift */
193 #define MC44S803_REG_MS(_val, _reg) \
194 (((_val) & (_reg)) >> _reg##_S)
196 struct mc44s803_priv {
197 struct mc44s803_config *cfg;
198 struct i2c_adapter *i2c;
199 struct dvb_frontend *fe;
201 u32 frequency;
204 #endif