drivers/media/tuners/mt2060.c

   1 /*
   2  *  Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
   3  *
   4  *  Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  */
  17
  18 /* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
  19
  20 #include <linux/module.h>
  21 #include <linux/delay.h>
  22 #include <linux/dvb/frontend.h>
  23 #include <linux/i2c.h>
  24 #include <linux/slab.h>
  25
  26 #include "dvb_frontend.h"
  27
  28 #include "mt2060.h"
  29 #include "mt2060_priv.h"
  30
  31 static int debug;
  32 module_param(debug, int, 0644);
  33 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  34
  35 #define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2060: " args); printk("\n"); }} while (0)
  36
  37 // Reads a single register
  38 static int mt2060_readreg(struct mt2060_priv *priv, u8 reg, u8 *val)
  39 {
  40         struct i2c_msg msg[2] = {
  41                 { .addr = priv->cfg->i2c_address, .flags = 0,        .buf = &reg, .len = 1 },
  42                 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val,  .len = 1 },
  43         };
  44
  45         if (i2c_transfer(priv->i2c, msg, 2) != 2) {
  46                 printk(KERN_WARNING "mt2060 I2C read failed\n");
  47                 return -EREMOTEIO;
  48         }
  49         return 0;
  50 }
  51
  52 // Writes a single register
  53 static int mt2060_writereg(struct mt2060_priv *priv, u8 reg, u8 val)
  54 {
  55         u8 buf[2] = { reg, val };
  56         struct i2c_msg msg = {
  57                 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
  58         };
  59
  60         if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  61                 printk(KERN_WARNING "mt2060 I2C write failed\n");
  62                 return -EREMOTEIO;
  63         }
  64         return 0;
  65 }
  66
  67 // Writes a set of consecutive registers
  68 static int mt2060_writeregs(struct mt2060_priv *priv,u8 *buf, u8 len)
  69 {
  70         int rem, val_len;
  71         u8 xfer_buf[16];
  72         struct i2c_msg msg = {
  73                 .addr = priv->cfg->i2c_address, .flags = 0, .buf = xfer_buf
  74         };
  75
  76         for (rem = len - 1; rem > 0; rem -= priv->i2c_max_regs) {
  77                 val_len = min_t(int, rem, priv->i2c_max_regs);
  78                 msg.len = 1 + val_len;
  79                 xfer_buf[0] = buf[0] + len - 1 - rem;
  80                 memcpy(&xfer_buf[1], &buf[1 + len - 1 - rem], val_len);
  81
  82                 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  83                         printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n", val_len);
  84                         return -EREMOTEIO;
  85                 }
  86         }
  87
  88         return 0;
  89 }
  90
  91 // Initialisation sequences
  92 // LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49
  93 static u8 mt2060_config1[] = {
  94         REG_LO1C1,
  95         0x3F,   0x74,   0x00,   0x08,   0x93
  96 };
  97
  98 // FMCG=2, GP2=0, GP1=0
  99 static u8 mt2060_config2[] = {
 100         REG_MISC_CTRL,
 101         0x20,   0x1E,   0x30,   0xff,   0x80,   0xff,   0x00,   0x2c,   0x42
 102 };
 103
 104 //  VGAG=3, V1CSE=1
 105
 106 #ifdef  MT2060_SPURCHECK
 107 /* The function below calculates the frequency offset between the output frequency if2
 108  and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */
 109 static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2)
 110 {
 111         int I,J;
 112         int dia,diamin,diff;
 113         diamin=1000000;
 114         for (I = 1; I < 10; I++) {
 115                 J = ((2*I*lo1)/lo2+1)/2;
 116                 diff = I*(int)lo1-J*(int)lo2;
 117                 if (diff < 0) diff=-diff;
 118                 dia = (diff-(int)if2);
 119                 if (dia < 0) dia=-dia;
 120                 if (diamin > dia) diamin=dia;
 121         }
 122         return diamin;
 123 }
 124
 125 #define BANDWIDTH 4000 // kHz
 126
 127 /* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */
 128 static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
 129 {
 130         u32 Spur,Sp1,Sp2;
 131         int I,J;
 132         I=0;
 133         J=1000;
 134
 135         Spur=mt2060_spurcalc(lo1,lo2,if2);
 136         if (Spur < BANDWIDTH) {
 137                 /* Potential spurs detected */
 138                 dprintk("Spurs before : f_lo1: %d  f_lo2: %d  (kHz)",
 139                         (int)lo1,(int)lo2);
 140                 I=1000;
 141                 Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2);
 142                 Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2);
 143
 144                 if (Sp1 < Sp2) {
 145                         J=-J; I=-I; Spur=Sp2;
 146                 } else
 147                         Spur=Sp1;
 148
 149                 while (Spur < BANDWIDTH) {
 150                         I += J;
 151                         Spur = mt2060_spurcalc(lo1+I,lo2+I,if2);
 152                 }
 153                 dprintk("Spurs after  : f_lo1: %d  f_lo2: %d  (kHz)",
 154                         (int)(lo1+I),(int)(lo2+I));
 155         }
 156         return I;
 157 }
 158 #endif
 159
 160 #define IF2  36150       // IF2 frequency = 36.150 MHz
 161 #define FREF 16000       // Quartz oscillator 16 MHz
 162
 163 static int mt2060_set_params(struct dvb_frontend *fe)
 164 {
 165         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 166         struct mt2060_priv *priv;
 167         int i=0;
 168         u32 freq;
 169         u8  lnaband;
 170         u32 f_lo1,f_lo2;
 171         u32 div1,num1,div2,num2;
 172         u8  b[8];
 173         u32 if1;
 174
 175         priv = fe->tuner_priv;
 176
 177         if1 = priv->if1_freq;
 178         b[0] = REG_LO1B1;
 179         b[1] = 0xFF;
 180
 181         if (fe->ops.i2c_gate_ctrl)
 182                 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
 183
 184         mt2060_writeregs(priv,b,2);
 185
 186         freq = c->frequency / 1000; /* Hz -> kHz */
 187
 188         f_lo1 = freq + if1 * 1000;
 189         f_lo1 = (f_lo1 / 250) * 250;
 190         f_lo2 = f_lo1 - freq - IF2;
 191         // From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise
 192         f_lo2 = ((f_lo2 + 25) / 50) * 50;
 193         priv->frequency =  (f_lo1 - f_lo2 - IF2) * 1000,
 194
 195 #ifdef MT2060_SPURCHECK
 196         // LO-related spurs detection and correction
 197         num1   = mt2060_spurcheck(f_lo1,f_lo2,IF2);
 198         f_lo1 += num1;
 199         f_lo2 += num1;
 200 #endif
 201         //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 )
 202         num1 = f_lo1 / (FREF / 64);
 203         div1 = num1 / 64;
 204         num1 &= 0x3f;
 205
 206         // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 )
 207         num2 = f_lo2 * 64 / (FREF / 128);
 208         div2 = num2 / 8192;
 209         num2 &= 0x1fff;
 210
 211         if (freq <=  95000) lnaband = 0xB0; else
 212         if (freq <= 180000) lnaband = 0xA0; else
 213         if (freq <= 260000) lnaband = 0x90; else
 214         if (freq <= 335000) lnaband = 0x80; else
 215         if (freq <= 425000) lnaband = 0x70; else
 216         if (freq <= 480000) lnaband = 0x60; else
 217         if (freq <= 570000) lnaband = 0x50; else
 218         if (freq <= 645000) lnaband = 0x40; else
 219         if (freq <= 730000) lnaband = 0x30; else
 220         if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10;
 221
 222         b[0] = REG_LO1C1;
 223         b[1] = lnaband | ((num1 >>2) & 0x0F);
 224         b[2] = div1;
 225         b[3] = (num2 & 0x0F)  | ((num1 & 3) << 4);
 226         b[4] = num2 >> 4;
 227         b[5] = ((num2 >>12) & 1) | (div2 << 1);
 228
 229         dprintk("IF1: %dMHz",(int)if1);
 230         dprintk("PLL freq=%dkHz  f_lo1=%dkHz  f_lo2=%dkHz",(int)freq,(int)f_lo1,(int)f_lo2);
 231         dprintk("PLL div1=%d  num1=%d  div2=%d  num2=%d",(int)div1,(int)num1,(int)div2,(int)num2);
 232         dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]);
 233
 234         mt2060_writeregs(priv,b,6);
 235
 236         //Waits for pll lock or timeout
 237         i = 0;
 238         do {
 239                 mt2060_readreg(priv,REG_LO_STATUS,b);
 240                 if ((b[0] & 0x88)==0x88)
 241                         break;
 242                 msleep(4);
 243                 i++;
 244         } while (i<10);
 245
 246         if (fe->ops.i2c_gate_ctrl)
 247                 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
 248
 249         return 0;
 250 }
 251
 252 static void mt2060_calibrate(struct mt2060_priv *priv)
 253 {
 254         u8 b = 0;
 255         int i = 0;
 256
 257         if (mt2060_writeregs(priv,mt2060_config1,sizeof(mt2060_config1)))
 258                 return;
 259         if (mt2060_writeregs(priv,mt2060_config2,sizeof(mt2060_config2)))
 260                 return;
 261
 262         /* initialize the clock output */
 263         mt2060_writereg(priv, REG_VGAG, (priv->cfg->clock_out << 6) | 0x30);
 264
 265         do {
 266                 b |= (1 << 6); // FM1SS;
 267                 mt2060_writereg(priv, REG_LO2C1,b);
 268                 msleep(20);
 269
 270                 if (i == 0) {
 271                         b |= (1 << 7); // FM1CA;
 272                         mt2060_writereg(priv, REG_LO2C1,b);
 273                         b &= ~(1 << 7); // FM1CA;
 274                         msleep(20);
 275                 }
 276
 277                 b &= ~(1 << 6); // FM1SS
 278                 mt2060_writereg(priv, REG_LO2C1,b);
 279
 280                 msleep(20);
 281                 i++;
 282         } while (i < 9);
 283
 284         i = 0;
 285         while (i++ < 10 && mt2060_readreg(priv, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0)
 286                 msleep(20);
 287
 288         if (i <= 10) {
 289                 mt2060_readreg(priv, REG_FM_FREQ, &priv->fmfreq); // now find out, what is fmreq used for :)
 290                 dprintk("calibration was successful: %d", (int)priv->fmfreq);
 291         } else
 292                 dprintk("FMCAL timed out");
 293 }
 294
 295 static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency)
 296 {
 297         struct mt2060_priv *priv = fe->tuner_priv;
 298         *frequency = priv->frequency;
 299         return 0;
 300 }
 301
 302 static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
 303 {
 304         *frequency = IF2 * 1000;
 305         return 0;
 306 }
 307
 308 static int mt2060_init(struct dvb_frontend *fe)
 309 {
 310         struct mt2060_priv *priv = fe->tuner_priv;
 311         int ret;
 312
 313         if (fe->ops.i2c_gate_ctrl)
 314                 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
 315
 316         if (priv->sleep) {
 317                 ret = mt2060_writereg(priv, REG_MISC_CTRL, 0x20);
 318                 if (ret)
 319                         goto err_i2c_gate_ctrl;
 320         }
 321
 322         ret = mt2060_writereg(priv, REG_VGAG,
 323                               (priv->cfg->clock_out << 6) | 0x33);
 324
 325 err_i2c_gate_ctrl:
 326         if (fe->ops.i2c_gate_ctrl)
 327                 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
 328
 329         return ret;
 330 }
 331
 332 static int mt2060_sleep(struct dvb_frontend *fe)
 333 {
 334         struct mt2060_priv *priv = fe->tuner_priv;
 335         int ret;
 336
 337         if (fe->ops.i2c_gate_ctrl)
 338                 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
 339
 340         ret = mt2060_writereg(priv, REG_VGAG,
 341                               (priv->cfg->clock_out << 6) | 0x30);
 342         if (ret)
 343                 goto err_i2c_gate_ctrl;
 344
 345         if (priv->sleep)
 346                 ret = mt2060_writereg(priv, REG_MISC_CTRL, 0xe8);
 347
 348 err_i2c_gate_ctrl:
 349         if (fe->ops.i2c_gate_ctrl)
 350                 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
 351
 352         return ret;
 353 }
 354
 355 static void mt2060_release(struct dvb_frontend *fe)
 356 {
 357         kfree(fe->tuner_priv);
 358         fe->tuner_priv = NULL;
 359 }
 360
 361 static const struct dvb_tuner_ops mt2060_tuner_ops = {
 362         .info = {
 363                 .name           = "Microtune MT2060",
 364                 .frequency_min  =  48000000,
 365                 .frequency_max  = 860000000,
 366                 .frequency_step =     50000,
 367         },
 368
 369         .release       = mt2060_release,
 370
 371         .init          = mt2060_init,
 372         .sleep         = mt2060_sleep,
 373
 374         .set_params    = mt2060_set_params,
 375         .get_frequency = mt2060_get_frequency,
 376         .get_if_frequency = mt2060_get_if_frequency,
 377 };
 378
 379 /* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
 380 struct dvb_frontend * mt2060_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2060_config *cfg, u16 if1)
 381 {
 382         struct mt2060_priv *priv = NULL;
 383         u8 id = 0;
 384
 385         priv = kzalloc(sizeof(struct mt2060_priv), GFP_KERNEL);
 386         if (priv == NULL)
 387                 return NULL;
 388
 389         priv->cfg      = cfg;
 390         priv->i2c      = i2c;
 391         priv->if1_freq = if1;
 392         priv->i2c_max_regs = ~0;
 393
 394         if (fe->ops.i2c_gate_ctrl)
 395                 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
 396
 397         if (mt2060_readreg(priv,REG_PART_REV,&id) != 0) {
 398                 kfree(priv);
 399                 return NULL;
 400         }
 401
 402         if (id != PART_REV) {
 403                 kfree(priv);
 404                 return NULL;
 405         }
 406         printk(KERN_INFO "MT2060: successfully identified (IF1 = %d)\n", if1);
 407         memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(struct dvb_tuner_ops));
 408
 409         fe->tuner_priv = priv;
 410
 411         mt2060_calibrate(priv);
 412
 413         if (fe->ops.i2c_gate_ctrl)
 414                 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
 415
 416         return fe;
 417 }
 418 EXPORT_SYMBOL(mt2060_attach);
 419
 420 static int mt2060_probe(struct i2c_client *client,
 421                         const struct i2c_device_id *id)
 422 {
 423         struct mt2060_platform_data *pdata = client->dev.platform_data;
 424         struct dvb_frontend *fe;
 425         struct mt2060_priv *dev;
 426         int ret;
 427         u8 chip_id;
 428
 429         dev_dbg(&client->dev, "\n");
 430
 431         if (!pdata) {
 432                 dev_err(&client->dev, "Cannot proceed without platform data\n");
 433                 ret = -EINVAL;
 434                 goto err;
 435         }
 436
 437         dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
 438         if (!dev) {
 439                 ret = -ENOMEM;
 440                 goto err;
 441         }
 442
 443         fe = pdata->dvb_frontend;
 444         dev->config.i2c_address = client->addr;
 445         dev->config.clock_out = pdata->clock_out;
 446         dev->cfg = &dev->config;
 447         dev->i2c = client->adapter;
 448         dev->if1_freq = pdata->if1 ? pdata->if1 : 1220;
 449         dev->client = client;
 450         dev->i2c_max_regs = pdata->i2c_write_max ? pdata->i2c_write_max - 1 : ~0;
 451         dev->sleep = true;
 452
 453         ret = mt2060_readreg(dev, REG_PART_REV, &chip_id);
 454         if (ret) {
 455                 ret = -ENODEV;
 456                 goto err;
 457         }
 458
 459         dev_dbg(&client->dev, "chip id=%02x\n", chip_id);
 460
 461         if (chip_id != PART_REV) {
 462                 ret = -ENODEV;
 463                 goto err;
 464         }
 465
 466         /* Power on, calibrate, sleep */
 467         ret = mt2060_writereg(dev, REG_MISC_CTRL, 0x20);
 468         if (ret)
 469                 goto err;
 470         mt2060_calibrate(dev);
 471         ret = mt2060_writereg(dev, REG_MISC_CTRL, 0xe8);
 472         if (ret)
 473                 goto err;
 474
 475         dev_info(&client->dev, "Microtune MT2060 successfully identified\n");
 476         memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(fe->ops.tuner_ops));
 477         fe->ops.tuner_ops.release = NULL;
 478         fe->tuner_priv = dev;
 479         i2c_set_clientdata(client, dev);
 480
 481         return 0;
 482 err:
 483         dev_dbg(&client->dev, "failed=%d\n", ret);
 484         return ret;
 485 }
 486
 487 static int mt2060_remove(struct i2c_client *client)
 488 {
 489         dev_dbg(&client->dev, "\n");
 490
 491         return 0;
 492 }
 493
 494 static const struct i2c_device_id mt2060_id_table[] = {
 495         {"mt2060", 0},
 496         {}
 497 };
 498 MODULE_DEVICE_TABLE(i2c, mt2060_id_table);
 499
 500 static struct i2c_driver mt2060_driver = {
 501         .driver = {
 502                 .name = "mt2060",
 503                 .suppress_bind_attrs = true,
 504         },
 505         .probe          = mt2060_probe,
 506         .remove         = mt2060_remove,
 507         .id_table       = mt2060_id_table,
 508 };
 509
 510 module_i2c_driver(mt2060_driver);
 511
 512 MODULE_AUTHOR("Olivier DANET");
 513 MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver");
 514 MODULE_LICENSE("GPL");