x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / media / tuners / mxl5005s.h
blobd842734f2dcd865b169ed38e00428ae1f68dc11c
1 /*
2 MaxLinear MXL5005S VSB/QAM/DVBT tuner driver
4 Copyright (C) 2008 MaxLinear
5 Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #ifndef __MXL5005S_H
24 #define __MXL5005S_H
26 #include <linux/i2c.h>
27 #include "dvb_frontend.h"
29 struct mxl5005s_config {
31 /* 7 bit i2c address */
32 u8 i2c_address;
34 #define IF_FREQ_4570000HZ 4570000
35 #define IF_FREQ_4571429HZ 4571429
36 #define IF_FREQ_5380000HZ 5380000
37 #define IF_FREQ_36000000HZ 36000000
38 #define IF_FREQ_36125000HZ 36125000
39 #define IF_FREQ_36166667HZ 36166667
40 #define IF_FREQ_44000000HZ 44000000
41 u32 if_freq;
43 #define CRYSTAL_FREQ_4000000HZ 4000000
44 #define CRYSTAL_FREQ_16000000HZ 16000000
45 #define CRYSTAL_FREQ_25000000HZ 25000000
46 #define CRYSTAL_FREQ_28800000HZ 28800000
47 u32 xtal_freq;
49 #define MXL_DUAL_AGC 0
50 #define MXL_SINGLE_AGC 1
51 u8 agc_mode;
53 #define MXL_TF_DEFAULT 0
54 #define MXL_TF_OFF 1
55 #define MXL_TF_C 2
56 #define MXL_TF_C_H 3
57 #define MXL_TF_D 4
58 #define MXL_TF_D_L 5
59 #define MXL_TF_E 6
60 #define MXL_TF_F 7
61 #define MXL_TF_E_2 8
62 #define MXL_TF_E_NA 9
63 #define MXL_TF_G 10
64 u8 tracking_filter;
66 #define MXL_RSSI_DISABLE 0
67 #define MXL_RSSI_ENABLE 1
68 u8 rssi_enable;
70 #define MXL_CAP_SEL_DISABLE 0
71 #define MXL_CAP_SEL_ENABLE 1
72 u8 cap_select;
74 #define MXL_DIV_OUT_1 0
75 #define MXL_DIV_OUT_4 1
76 u8 div_out;
78 #define MXL_CLOCK_OUT_DISABLE 0
79 #define MXL_CLOCK_OUT_ENABLE 1
80 u8 clock_out;
82 #define MXL5005S_IF_OUTPUT_LOAD_200_OHM 200
83 #define MXL5005S_IF_OUTPUT_LOAD_300_OHM 300
84 u32 output_load;
86 #define MXL5005S_TOP_5P5 55
87 #define MXL5005S_TOP_7P2 72
88 #define MXL5005S_TOP_9P2 92
89 #define MXL5005S_TOP_11P0 110
90 #define MXL5005S_TOP_12P9 129
91 #define MXL5005S_TOP_14P7 147
92 #define MXL5005S_TOP_16P8 168
93 #define MXL5005S_TOP_19P4 194
94 #define MXL5005S_TOP_21P2 212
95 #define MXL5005S_TOP_23P2 232
96 #define MXL5005S_TOP_25P2 252
97 #define MXL5005S_TOP_27P1 271
98 #define MXL5005S_TOP_29P2 292
99 #define MXL5005S_TOP_31P7 317
100 #define MXL5005S_TOP_34P9 349
101 u32 top;
103 #define MXL_ANALOG_MODE 0
104 #define MXL_DIGITAL_MODE 1
105 u8 mod_mode;
107 #define MXL_ZERO_IF 0
108 #define MXL_LOW_IF 1
109 u8 if_mode;
111 /* Some boards need to override the built-in logic for determining
112 the gain when in QAM mode (the HVR-1600 is one such case) */
113 u8 qam_gain;
115 /* Stuff I don't know what to do with */
116 u8 AgcMasterByte;
119 #if IS_REACHABLE(CONFIG_MEDIA_TUNER_MXL5005S)
120 extern struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe,
121 struct i2c_adapter *i2c,
122 struct mxl5005s_config *config);
123 #else
124 static inline struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe,
125 struct i2c_adapter *i2c,
126 struct mxl5005s_config *config)
128 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
129 return NULL;
131 #endif /* CONFIG_DVB_TUNER_MXL5005S */
133 #endif /* __MXL5005S_H */