2 * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
4 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/i2c.h>
18 #include <linux/types.h>
19 #include <linux/videodev2.h>
20 #include "tuner-i2c.h"
23 static DEFINE_MUTEX(mxl5007t_list_mutex
);
24 static LIST_HEAD(hybrid_tuner_instance_list
);
26 static int mxl5007t_debug
;
27 module_param_named(debug
, mxl5007t_debug
, int, 0644);
28 MODULE_PARM_DESC(debug
, "set debug level");
30 /* ------------------------------------------------------------------------- */
32 #define mxl_printk(kern, fmt, arg...) \
33 printk(kern "%s: " fmt "\n", __func__, ##arg)
35 #define mxl_err(fmt, arg...) \
36 mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
38 #define mxl_warn(fmt, arg...) \
39 mxl_printk(KERN_WARNING, fmt, ##arg)
41 #define mxl_info(fmt, arg...) \
42 mxl_printk(KERN_INFO, fmt, ##arg)
44 #define mxl_debug(fmt, arg...) \
47 mxl_printk(KERN_DEBUG, fmt, ##arg); \
50 #define mxl_fail(ret) \
55 mxl_printk(KERN_ERR, "error %d on line %d", \
60 /* ------------------------------------------------------------------------- */
68 MxL_MODE_CABLE
= 0x10,
71 enum mxl5007t_chip_version
{
72 MxL_UNKNOWN_ID
= 0x00,
73 MxL_5007_V1_F1
= 0x11,
74 MxL_5007_V1_F2
= 0x12,
76 MxL_5007_V2_100_F1
= 0x21,
77 MxL_5007_V2_100_F2
= 0x22,
78 MxL_5007_V2_200_F1
= 0x23,
79 MxL_5007_V2_200_F2
= 0x24,
87 /* ------------------------------------------------------------------------- */
89 static struct reg_pair_t init_tab
[] = {
94 { 0x2e, 0x15 }, /* OVERRIDE */
95 { 0x30, 0x10 }, /* OVERRIDE */
96 { 0x45, 0x58 }, /* OVERRIDE */
97 { 0x48, 0x19 }, /* OVERRIDE */
98 { 0x52, 0x03 }, /* OVERRIDE */
99 { 0x53, 0x44 }, /* OVERRIDE */
100 { 0x6a, 0x4b }, /* OVERRIDE */
101 { 0x76, 0x00 }, /* OVERRIDE */
102 { 0x78, 0x18 }, /* OVERRIDE */
103 { 0x7a, 0x17 }, /* OVERRIDE */
104 { 0x85, 0x06 }, /* OVERRIDE */
105 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
109 static struct reg_pair_t init_tab_cable
[] = {
117 { 0x2e, 0x15 }, /* OVERRIDE */
118 { 0x30, 0x10 }, /* OVERRIDE */
119 { 0x45, 0x58 }, /* OVERRIDE */
120 { 0x48, 0x19 }, /* OVERRIDE */
121 { 0x52, 0x03 }, /* OVERRIDE */
122 { 0x53, 0x44 }, /* OVERRIDE */
123 { 0x6a, 0x4b }, /* OVERRIDE */
124 { 0x76, 0x00 }, /* OVERRIDE */
125 { 0x78, 0x18 }, /* OVERRIDE */
126 { 0x7a, 0x17 }, /* OVERRIDE */
127 { 0x85, 0x06 }, /* OVERRIDE */
128 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
132 /* ------------------------------------------------------------------------- */
134 static struct reg_pair_t reg_pair_rftune
[] = {
135 { 0x0f, 0x00 }, /* abort tune */
139 { 0x1f, 0x87 }, /* OVERRIDE */
140 { 0x20, 0x1f }, /* OVERRIDE */
141 { 0x21, 0x87 }, /* OVERRIDE */
142 { 0x22, 0x1f }, /* OVERRIDE */
143 { 0x80, 0x01 }, /* freq dependent */
144 { 0x0f, 0x01 }, /* start tune */
148 /* ------------------------------------------------------------------------- */
150 struct mxl5007t_state
{
151 struct list_head hybrid_tuner_instance_list
;
152 struct tuner_i2c_props i2c_props
;
156 struct mxl5007t_config
*config
;
158 enum mxl5007t_chip_version chip_id
;
160 struct reg_pair_t tab_init
[ARRAY_SIZE(init_tab
)];
161 struct reg_pair_t tab_init_cable
[ARRAY_SIZE(init_tab_cable
)];
162 struct reg_pair_t tab_rftune
[ARRAY_SIZE(reg_pair_rftune
)];
164 enum mxl5007t_if_freq if_freq
;
170 /* ------------------------------------------------------------------------- */
172 /* called by _init and _rftun to manipulate the register arrays */
174 static void set_reg_bits(struct reg_pair_t
*reg_pair
, u8 reg
, u8 mask
, u8 val
)
178 while (reg_pair
[i
].reg
|| reg_pair
[i
].val
) {
179 if (reg_pair
[i
].reg
== reg
) {
180 reg_pair
[i
].val
&= ~mask
;
181 reg_pair
[i
].val
|= val
;
189 static void copy_reg_bits(struct reg_pair_t
*reg_pair1
,
190 struct reg_pair_t
*reg_pair2
)
196 while (reg_pair1
[i
].reg
|| reg_pair1
[i
].val
) {
197 while (reg_pair2
[j
].reg
|| reg_pair2
[j
].val
) {
198 if (reg_pair1
[i
].reg
!= reg_pair2
[j
].reg
) {
202 reg_pair2
[j
].val
= reg_pair1
[i
].val
;
210 /* ------------------------------------------------------------------------- */
212 static void mxl5007t_set_mode_bits(struct mxl5007t_state
*state
,
213 enum mxl5007t_mode mode
,
214 s32 if_diff_out_level
)
218 set_reg_bits(state
->tab_init
, 0x06, 0x1f, 0x12);
221 set_reg_bits(state
->tab_init
, 0x06, 0x1f, 0x11);
224 set_reg_bits(state
->tab_init
, 0x06, 0x1f, 0x10);
227 set_reg_bits(state
->tab_init_cable
, 0x09, 0xff, 0xc1);
228 set_reg_bits(state
->tab_init_cable
, 0x0a, 0xff,
229 8 - if_diff_out_level
);
230 set_reg_bits(state
->tab_init_cable
, 0x0b, 0xff, 0x17);
238 static void mxl5007t_set_if_freq_bits(struct mxl5007t_state
*state
,
239 enum mxl5007t_if_freq if_freq
,
251 case MxL_IF_4_57_MHZ
:
257 case MxL_IF_5_38_MHZ
:
263 case MxL_IF_6_28_MHZ
:
266 case MxL_IF_9_1915_MHZ
:
269 case MxL_IF_35_25_MHZ
:
272 case MxL_IF_36_15_MHZ
:
282 set_reg_bits(state
->tab_init
, 0x02, 0x0f, val
);
284 /* set inverted IF or normal IF */
285 set_reg_bits(state
->tab_init
, 0x02, 0x10, invert_if
? 0x10 : 0x00);
287 state
->if_freq
= if_freq
;
292 static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state
*state
,
293 enum mxl5007t_xtal_freq xtal_freq
)
296 case MxL_XTAL_16_MHZ
:
297 /* select xtal freq & ref freq */
298 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x00);
299 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x00);
301 case MxL_XTAL_20_MHZ
:
302 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x10);
303 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x01);
305 case MxL_XTAL_20_25_MHZ
:
306 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x20);
307 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x02);
309 case MxL_XTAL_20_48_MHZ
:
310 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x30);
311 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x03);
313 case MxL_XTAL_24_MHZ
:
314 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x40);
315 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x04);
317 case MxL_XTAL_25_MHZ
:
318 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x50);
319 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x05);
321 case MxL_XTAL_25_14_MHZ
:
322 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x60);
323 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x06);
325 case MxL_XTAL_27_MHZ
:
326 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x70);
327 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x07);
329 case MxL_XTAL_28_8_MHZ
:
330 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x80);
331 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x08);
333 case MxL_XTAL_32_MHZ
:
334 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0x90);
335 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x09);
337 case MxL_XTAL_40_MHZ
:
338 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0xa0);
339 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x0a);
341 case MxL_XTAL_44_MHZ
:
342 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0xb0);
343 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x0b);
345 case MxL_XTAL_48_MHZ
:
346 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0xc0);
347 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x0c);
349 case MxL_XTAL_49_3811_MHZ
:
350 set_reg_bits(state
->tab_init
, 0x03, 0xf0, 0xd0);
351 set_reg_bits(state
->tab_init
, 0x05, 0x0f, 0x0d);
361 static struct reg_pair_t
*mxl5007t_calc_init_regs(struct mxl5007t_state
*state
,
362 enum mxl5007t_mode mode
)
364 struct mxl5007t_config
*cfg
= state
->config
;
366 memcpy(&state
->tab_init
, &init_tab
, sizeof(init_tab
));
367 memcpy(&state
->tab_init_cable
, &init_tab_cable
, sizeof(init_tab_cable
));
369 mxl5007t_set_mode_bits(state
, mode
, cfg
->if_diff_out_level
);
370 mxl5007t_set_if_freq_bits(state
, cfg
->if_freq_hz
, cfg
->invert_if
);
371 mxl5007t_set_xtal_freq_bits(state
, cfg
->xtal_freq_hz
);
373 set_reg_bits(state
->tab_init
, 0x03, 0x08, cfg
->clk_out_enable
<< 3);
374 set_reg_bits(state
->tab_init
, 0x03, 0x07, cfg
->clk_out_amp
);
376 if (mode
>= MxL_MODE_CABLE
) {
377 copy_reg_bits(state
->tab_init
, state
->tab_init_cable
);
378 return state
->tab_init_cable
;
380 return state
->tab_init
;
383 /* ------------------------------------------------------------------------- */
385 enum mxl5007t_bw_mhz
{
391 static void mxl5007t_set_bw_bits(struct mxl5007t_state
*state
,
392 enum mxl5007t_bw_mhz bw
)
398 val
= 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
399 * and DIG_MODEINDEX_CSF */
411 set_reg_bits(state
->tab_rftune
, 0x0c, 0x3f, val
);
417 reg_pair_t
*mxl5007t_calc_rf_tune_regs(struct mxl5007t_state
*state
,
418 u32 rf_freq
, enum mxl5007t_bw_mhz bw
)
422 u32 frac_divider
= 1000000;
425 memcpy(&state
->tab_rftune
, ®_pair_rftune
, sizeof(reg_pair_rftune
));
427 mxl5007t_set_bw_bits(state
, bw
);
429 /* Convert RF frequency into 16 bits =>
430 * 10 bit integer (MHz) + 6 bit fraction */
431 dig_rf_freq
= rf_freq
/ MHz
;
433 temp
= rf_freq
% MHz
;
435 for (i
= 0; i
< 6; i
++) {
438 if (temp
> frac_divider
) {
439 temp
-= frac_divider
;
444 /* add to have shift center point by 7.8124 kHz */
448 set_reg_bits(state
->tab_rftune
, 0x0d, 0xff, (u8
) dig_rf_freq
);
449 set_reg_bits(state
->tab_rftune
, 0x0e, 0xff, (u8
) (dig_rf_freq
>> 8));
451 if (rf_freq
>= 333000000)
452 set_reg_bits(state
->tab_rftune
, 0x80, 0x40, 0x40);
454 return state
->tab_rftune
;
457 /* ------------------------------------------------------------------------- */
459 static int mxl5007t_write_reg(struct mxl5007t_state
*state
, u8 reg
, u8 val
)
461 u8 buf
[] = { reg
, val
};
462 struct i2c_msg msg
= { .addr
= state
->i2c_props
.addr
, .flags
= 0,
463 .buf
= buf
, .len
= 2 };
466 ret
= i2c_transfer(state
->i2c_props
.adap
, &msg
, 1);
474 static int mxl5007t_write_regs(struct mxl5007t_state
*state
,
475 struct reg_pair_t
*reg_pair
)
480 while ((ret
== 0) && (reg_pair
[i
].reg
|| reg_pair
[i
].val
)) {
481 ret
= mxl5007t_write_reg(state
,
482 reg_pair
[i
].reg
, reg_pair
[i
].val
);
488 static int mxl5007t_read_reg(struct mxl5007t_state
*state
, u8 reg
, u8
*val
)
490 u8 buf
[2] = { 0xfb, reg
};
491 struct i2c_msg msg
[] = {
492 { .addr
= state
->i2c_props
.addr
, .flags
= 0,
493 .buf
= buf
, .len
= 2 },
494 { .addr
= state
->i2c_props
.addr
, .flags
= I2C_M_RD
,
495 .buf
= val
, .len
= 1 },
499 ret
= i2c_transfer(state
->i2c_props
.adap
, msg
, 2);
507 static int mxl5007t_soft_reset(struct mxl5007t_state
*state
)
510 struct i2c_msg msg
= {
511 .addr
= state
->i2c_props
.addr
, .flags
= 0,
514 int ret
= i2c_transfer(state
->i2c_props
.adap
, &msg
, 1);
523 static int mxl5007t_tuner_init(struct mxl5007t_state
*state
,
524 enum mxl5007t_mode mode
)
526 struct reg_pair_t
*init_regs
;
529 /* calculate initialization reg array */
530 init_regs
= mxl5007t_calc_init_regs(state
, mode
);
532 ret
= mxl5007t_write_regs(state
, init_regs
);
540 static int mxl5007t_tuner_rf_tune(struct mxl5007t_state
*state
, u32 rf_freq_hz
,
541 enum mxl5007t_bw_mhz bw
)
543 struct reg_pair_t
*rf_tune_regs
;
546 /* calculate channel change reg array */
547 rf_tune_regs
= mxl5007t_calc_rf_tune_regs(state
, rf_freq_hz
, bw
);
549 ret
= mxl5007t_write_regs(state
, rf_tune_regs
);
557 /* ------------------------------------------------------------------------- */
559 static int mxl5007t_synth_lock_status(struct mxl5007t_state
*state
,
560 int *rf_locked
, int *ref_locked
)
568 ret
= mxl5007t_read_reg(state
, 0xd8, &d
);
572 if ((d
& 0x0c) == 0x0c)
575 if ((d
& 0x03) == 0x03)
581 /* ------------------------------------------------------------------------- */
583 static int mxl5007t_get_status(struct dvb_frontend
*fe
, u32
*status
)
585 struct mxl5007t_state
*state
= fe
->tuner_priv
;
586 int rf_locked
, ref_locked
, ret
;
590 if (fe
->ops
.i2c_gate_ctrl
)
591 fe
->ops
.i2c_gate_ctrl(fe
, 1);
593 ret
= mxl5007t_synth_lock_status(state
, &rf_locked
, &ref_locked
);
596 mxl_debug("%s%s", rf_locked
? "rf locked " : "",
597 ref_locked
? "ref locked" : "");
599 if ((rf_locked
) || (ref_locked
))
600 *status
|= TUNER_STATUS_LOCKED
;
602 if (fe
->ops
.i2c_gate_ctrl
)
603 fe
->ops
.i2c_gate_ctrl(fe
, 0);
608 /* ------------------------------------------------------------------------- */
610 static int mxl5007t_set_params(struct dvb_frontend
*fe
)
612 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
613 u32 delsys
= c
->delivery_system
;
614 struct mxl5007t_state
*state
= fe
->tuner_priv
;
615 enum mxl5007t_bw_mhz bw
;
616 enum mxl5007t_mode mode
;
618 u32 freq
= c
->frequency
;
622 mode
= MxL_MODE_ATSC
;
625 case SYS_DVBC_ANNEX_B
:
626 mode
= MxL_MODE_CABLE
;
631 mode
= MxL_MODE_DVBT
;
632 switch (c
->bandwidth_hz
) {
647 mxl_err("modulation type not supported!");
651 if (fe
->ops
.i2c_gate_ctrl
)
652 fe
->ops
.i2c_gate_ctrl(fe
, 1);
654 mutex_lock(&state
->lock
);
656 ret
= mxl5007t_tuner_init(state
, mode
);
660 ret
= mxl5007t_tuner_rf_tune(state
, freq
, bw
);
664 state
->frequency
= freq
;
665 state
->bandwidth
= c
->bandwidth_hz
;
667 mutex_unlock(&state
->lock
);
669 if (fe
->ops
.i2c_gate_ctrl
)
670 fe
->ops
.i2c_gate_ctrl(fe
, 0);
675 /* ------------------------------------------------------------------------- */
677 static int mxl5007t_init(struct dvb_frontend
*fe
)
679 struct mxl5007t_state
*state
= fe
->tuner_priv
;
682 if (fe
->ops
.i2c_gate_ctrl
)
683 fe
->ops
.i2c_gate_ctrl(fe
, 1);
685 /* wake from standby */
686 ret
= mxl5007t_write_reg(state
, 0x01, 0x01);
689 if (fe
->ops
.i2c_gate_ctrl
)
690 fe
->ops
.i2c_gate_ctrl(fe
, 0);
695 static int mxl5007t_sleep(struct dvb_frontend
*fe
)
697 struct mxl5007t_state
*state
= fe
->tuner_priv
;
700 if (fe
->ops
.i2c_gate_ctrl
)
701 fe
->ops
.i2c_gate_ctrl(fe
, 1);
703 /* enter standby mode */
704 ret
= mxl5007t_write_reg(state
, 0x01, 0x00);
706 ret
= mxl5007t_write_reg(state
, 0x0f, 0x00);
709 if (fe
->ops
.i2c_gate_ctrl
)
710 fe
->ops
.i2c_gate_ctrl(fe
, 0);
715 /* ------------------------------------------------------------------------- */
717 static int mxl5007t_get_frequency(struct dvb_frontend
*fe
, u32
*frequency
)
719 struct mxl5007t_state
*state
= fe
->tuner_priv
;
720 *frequency
= state
->frequency
;
724 static int mxl5007t_get_bandwidth(struct dvb_frontend
*fe
, u32
*bandwidth
)
726 struct mxl5007t_state
*state
= fe
->tuner_priv
;
727 *bandwidth
= state
->bandwidth
;
731 static int mxl5007t_get_if_frequency(struct dvb_frontend
*fe
, u32
*frequency
)
733 struct mxl5007t_state
*state
= fe
->tuner_priv
;
737 switch (state
->if_freq
) {
739 *frequency
= 4000000;
742 *frequency
= 4500000;
744 case MxL_IF_4_57_MHZ
:
745 *frequency
= 4570000;
748 *frequency
= 5000000;
750 case MxL_IF_5_38_MHZ
:
751 *frequency
= 5380000;
754 *frequency
= 6000000;
756 case MxL_IF_6_28_MHZ
:
757 *frequency
= 6280000;
759 case MxL_IF_9_1915_MHZ
:
760 *frequency
= 9191500;
762 case MxL_IF_35_25_MHZ
:
763 *frequency
= 35250000;
765 case MxL_IF_36_15_MHZ
:
766 *frequency
= 36150000;
769 *frequency
= 44000000;
775 static void mxl5007t_release(struct dvb_frontend
*fe
)
777 struct mxl5007t_state
*state
= fe
->tuner_priv
;
779 mutex_lock(&mxl5007t_list_mutex
);
782 hybrid_tuner_release_state(state
);
784 mutex_unlock(&mxl5007t_list_mutex
);
786 fe
->tuner_priv
= NULL
;
789 /* ------------------------------------------------------------------------- */
791 static const struct dvb_tuner_ops mxl5007t_tuner_ops
= {
793 .name
= "MaxLinear MxL5007T",
795 .init
= mxl5007t_init
,
796 .sleep
= mxl5007t_sleep
,
797 .set_params
= mxl5007t_set_params
,
798 .get_status
= mxl5007t_get_status
,
799 .get_frequency
= mxl5007t_get_frequency
,
800 .get_bandwidth
= mxl5007t_get_bandwidth
,
801 .release
= mxl5007t_release
,
802 .get_if_frequency
= mxl5007t_get_if_frequency
,
805 static int mxl5007t_get_chip_id(struct mxl5007t_state
*state
)
811 ret
= mxl5007t_read_reg(state
, 0xd9, &id
);
817 name
= "MxL5007.v1.f1";
820 name
= "MxL5007.v1.f2";
822 case MxL_5007_V2_100_F1
:
823 name
= "MxL5007.v2.100.f1";
825 case MxL_5007_V2_100_F2
:
826 name
= "MxL5007.v2.100.f2";
828 case MxL_5007_V2_200_F1
:
829 name
= "MxL5007.v2.200.f1";
831 case MxL_5007_V2_200_F2
:
832 name
= "MxL5007.v2.200.f2";
835 name
= "MxL5007T.v4";
839 printk(KERN_WARNING
"%s: unknown rev (%02x)\n", __func__
, id
);
843 mxl_info("%s detected @ %d-%04x", name
,
844 i2c_adapter_id(state
->i2c_props
.adap
),
845 state
->i2c_props
.addr
);
848 mxl_warn("unable to identify device @ %d-%04x",
849 i2c_adapter_id(state
->i2c_props
.adap
),
850 state
->i2c_props
.addr
);
852 state
->chip_id
= MxL_UNKNOWN_ID
;
856 struct dvb_frontend
*mxl5007t_attach(struct dvb_frontend
*fe
,
857 struct i2c_adapter
*i2c
, u8 addr
,
858 struct mxl5007t_config
*cfg
)
860 struct mxl5007t_state
*state
= NULL
;
863 mutex_lock(&mxl5007t_list_mutex
);
864 instance
= hybrid_tuner_request_state(struct mxl5007t_state
, state
,
865 hybrid_tuner_instance_list
,
866 i2c
, addr
, "mxl5007t");
871 /* new tuner instance */
874 mutex_init(&state
->lock
);
876 if (fe
->ops
.i2c_gate_ctrl
)
877 fe
->ops
.i2c_gate_ctrl(fe
, 1);
879 ret
= mxl5007t_get_chip_id(state
);
881 if (fe
->ops
.i2c_gate_ctrl
)
882 fe
->ops
.i2c_gate_ctrl(fe
, 0);
884 /* check return value of mxl5007t_get_chip_id */
889 /* existing tuner instance */
893 if (fe
->ops
.i2c_gate_ctrl
)
894 fe
->ops
.i2c_gate_ctrl(fe
, 1);
896 ret
= mxl5007t_soft_reset(state
);
898 if (fe
->ops
.i2c_gate_ctrl
)
899 fe
->ops
.i2c_gate_ctrl(fe
, 0);
904 if (fe
->ops
.i2c_gate_ctrl
)
905 fe
->ops
.i2c_gate_ctrl(fe
, 1);
907 ret
= mxl5007t_write_reg(state
, 0x04,
908 state
->config
->loop_thru_enable
);
910 if (fe
->ops
.i2c_gate_ctrl
)
911 fe
->ops
.i2c_gate_ctrl(fe
, 0);
916 fe
->tuner_priv
= state
;
918 mutex_unlock(&mxl5007t_list_mutex
);
920 memcpy(&fe
->ops
.tuner_ops
, &mxl5007t_tuner_ops
,
921 sizeof(struct dvb_tuner_ops
));
925 mutex_unlock(&mxl5007t_list_mutex
);
927 mxl5007t_release(fe
);
930 EXPORT_SYMBOL_GPL(mxl5007t_attach
);
931 MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
932 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
933 MODULE_LICENSE("GPL");
934 MODULE_VERSION("0.2");