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x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / net / ethernet / intel / i40evf / i40e_common.c
blob89dfdbca13db794afe5ac0cbecee9c5ee4720626
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include "i40e_type.h"
28 #include "i40e_adminq.h"
29 #include "i40e_prototype.h"
30 #include "i40e_virtchnl.h"
31
32 /**
33 * i40e_set_mac_type - Sets MAC type
34 * @hw: pointer to the HW structure
35 *
36 * This function sets the mac type of the adapter based on the
37 * vendor ID and device ID stored in the hw structure.
38 **/
39 i40e_status i40e_set_mac_type(struct i40e_hw *hw)
40 {
41 i40e_status status = 0;
42
43 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
44 switch (hw->device_id) {
45 case I40E_DEV_ID_SFP_XL710:
46 case I40E_DEV_ID_QEMU:
47 case I40E_DEV_ID_KX_B:
48 case I40E_DEV_ID_KX_C:
49 case I40E_DEV_ID_QSFP_A:
50 case I40E_DEV_ID_QSFP_B:
51 case I40E_DEV_ID_QSFP_C:
52 case I40E_DEV_ID_10G_BASE_T:
53 case I40E_DEV_ID_10G_BASE_T4:
54 case I40E_DEV_ID_20G_KR2:
55 case I40E_DEV_ID_20G_KR2_A:
56 case I40E_DEV_ID_25G_B:
57 case I40E_DEV_ID_25G_SFP28:
58 hw->mac.type = I40E_MAC_XL710;
59 break;
60 case I40E_DEV_ID_SFP_X722:
61 case I40E_DEV_ID_1G_BASE_T_X722:
62 case I40E_DEV_ID_10G_BASE_T_X722:
63 case I40E_DEV_ID_SFP_I_X722:
64 hw->mac.type = I40E_MAC_X722;
65 break;
66 case I40E_DEV_ID_X722_VF:
67 hw->mac.type = I40E_MAC_X722_VF;
68 break;
69 case I40E_DEV_ID_VF:
70 case I40E_DEV_ID_VF_HV:
71 hw->mac.type = I40E_MAC_VF;
72 break;
73 default:
74 hw->mac.type = I40E_MAC_GENERIC;
75 break;
76 }
77 } else {
78 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
79 }
80
81 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
82 hw->mac.type, status);
83 return status;
84 }
85
86 /**
87 * i40evf_aq_str - convert AQ err code to a string
88 * @hw: pointer to the HW structure
89 * @aq_err: the AQ error code to convert
90 **/
91 const char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
92 {
93 switch (aq_err) {
94 case I40E_AQ_RC_OK:
95 return "OK";
96 case I40E_AQ_RC_EPERM:
97 return "I40E_AQ_RC_EPERM";
98 case I40E_AQ_RC_ENOENT:
99 return "I40E_AQ_RC_ENOENT";
100 case I40E_AQ_RC_ESRCH:
101 return "I40E_AQ_RC_ESRCH";
102 case I40E_AQ_RC_EINTR:
103 return "I40E_AQ_RC_EINTR";
104 case I40E_AQ_RC_EIO:
105 return "I40E_AQ_RC_EIO";
106 case I40E_AQ_RC_ENXIO:
107 return "I40E_AQ_RC_ENXIO";
108 case I40E_AQ_RC_E2BIG:
109 return "I40E_AQ_RC_E2BIG";
110 case I40E_AQ_RC_EAGAIN:
111 return "I40E_AQ_RC_EAGAIN";
112 case I40E_AQ_RC_ENOMEM:
113 return "I40E_AQ_RC_ENOMEM";
114 case I40E_AQ_RC_EACCES:
115 return "I40E_AQ_RC_EACCES";
116 case I40E_AQ_RC_EFAULT:
117 return "I40E_AQ_RC_EFAULT";
118 case I40E_AQ_RC_EBUSY:
119 return "I40E_AQ_RC_EBUSY";
120 case I40E_AQ_RC_EEXIST:
121 return "I40E_AQ_RC_EEXIST";
122 case I40E_AQ_RC_EINVAL:
123 return "I40E_AQ_RC_EINVAL";
124 case I40E_AQ_RC_ENOTTY:
125 return "I40E_AQ_RC_ENOTTY";
126 case I40E_AQ_RC_ENOSPC:
127 return "I40E_AQ_RC_ENOSPC";
128 case I40E_AQ_RC_ENOSYS:
129 return "I40E_AQ_RC_ENOSYS";
130 case I40E_AQ_RC_ERANGE:
131 return "I40E_AQ_RC_ERANGE";
132 case I40E_AQ_RC_EFLUSHED:
133 return "I40E_AQ_RC_EFLUSHED";
134 case I40E_AQ_RC_BAD_ADDR:
135 return "I40E_AQ_RC_BAD_ADDR";
136 case I40E_AQ_RC_EMODE:
137 return "I40E_AQ_RC_EMODE";
138 case I40E_AQ_RC_EFBIG:
139 return "I40E_AQ_RC_EFBIG";
140 }
141
142 snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);
143 return hw->err_str;
144 }
145
146 /**
147 * i40evf_stat_str - convert status err code to a string
148 * @hw: pointer to the HW structure
149 * @stat_err: the status error code to convert
150 **/
151 const char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err)
152 {
153 switch (stat_err) {
154 case 0:
155 return "OK";
156 case I40E_ERR_NVM:
157 return "I40E_ERR_NVM";
158 case I40E_ERR_NVM_CHECKSUM:
159 return "I40E_ERR_NVM_CHECKSUM";
160 case I40E_ERR_PHY:
161 return "I40E_ERR_PHY";
162 case I40E_ERR_CONFIG:
163 return "I40E_ERR_CONFIG";
164 case I40E_ERR_PARAM:
165 return "I40E_ERR_PARAM";
166 case I40E_ERR_MAC_TYPE:
167 return "I40E_ERR_MAC_TYPE";
168 case I40E_ERR_UNKNOWN_PHY:
169 return "I40E_ERR_UNKNOWN_PHY";
170 case I40E_ERR_LINK_SETUP:
171 return "I40E_ERR_LINK_SETUP";
172 case I40E_ERR_ADAPTER_STOPPED:
173 return "I40E_ERR_ADAPTER_STOPPED";
174 case I40E_ERR_INVALID_MAC_ADDR:
175 return "I40E_ERR_INVALID_MAC_ADDR";
176 case I40E_ERR_DEVICE_NOT_SUPPORTED:
177 return "I40E_ERR_DEVICE_NOT_SUPPORTED";
178 case I40E_ERR_MASTER_REQUESTS_PENDING:
179 return "I40E_ERR_MASTER_REQUESTS_PENDING";
180 case I40E_ERR_INVALID_LINK_SETTINGS:
181 return "I40E_ERR_INVALID_LINK_SETTINGS";
182 case I40E_ERR_AUTONEG_NOT_COMPLETE:
183 return "I40E_ERR_AUTONEG_NOT_COMPLETE";
184 case I40E_ERR_RESET_FAILED:
185 return "I40E_ERR_RESET_FAILED";
186 case I40E_ERR_SWFW_SYNC:
187 return "I40E_ERR_SWFW_SYNC";
188 case I40E_ERR_NO_AVAILABLE_VSI:
189 return "I40E_ERR_NO_AVAILABLE_VSI";
190 case I40E_ERR_NO_MEMORY:
191 return "I40E_ERR_NO_MEMORY";
192 case I40E_ERR_BAD_PTR:
193 return "I40E_ERR_BAD_PTR";
194 case I40E_ERR_RING_FULL:
195 return "I40E_ERR_RING_FULL";
196 case I40E_ERR_INVALID_PD_ID:
197 return "I40E_ERR_INVALID_PD_ID";
198 case I40E_ERR_INVALID_QP_ID:
199 return "I40E_ERR_INVALID_QP_ID";
200 case I40E_ERR_INVALID_CQ_ID:
201 return "I40E_ERR_INVALID_CQ_ID";
202 case I40E_ERR_INVALID_CEQ_ID:
203 return "I40E_ERR_INVALID_CEQ_ID";
204 case I40E_ERR_INVALID_AEQ_ID:
205 return "I40E_ERR_INVALID_AEQ_ID";
206 case I40E_ERR_INVALID_SIZE:
207 return "I40E_ERR_INVALID_SIZE";
208 case I40E_ERR_INVALID_ARP_INDEX:
209 return "I40E_ERR_INVALID_ARP_INDEX";
210 case I40E_ERR_INVALID_FPM_FUNC_ID:
211 return "I40E_ERR_INVALID_FPM_FUNC_ID";
212 case I40E_ERR_QP_INVALID_MSG_SIZE:
213 return "I40E_ERR_QP_INVALID_MSG_SIZE";
214 case I40E_ERR_QP_TOOMANY_WRS_POSTED:
215 return "I40E_ERR_QP_TOOMANY_WRS_POSTED";
216 case I40E_ERR_INVALID_FRAG_COUNT:
217 return "I40E_ERR_INVALID_FRAG_COUNT";
218 case I40E_ERR_QUEUE_EMPTY:
219 return "I40E_ERR_QUEUE_EMPTY";
220 case I40E_ERR_INVALID_ALIGNMENT:
221 return "I40E_ERR_INVALID_ALIGNMENT";
222 case I40E_ERR_FLUSHED_QUEUE:
223 return "I40E_ERR_FLUSHED_QUEUE";
224 case I40E_ERR_INVALID_PUSH_PAGE_INDEX:
225 return "I40E_ERR_INVALID_PUSH_PAGE_INDEX";
226 case I40E_ERR_INVALID_IMM_DATA_SIZE:
227 return "I40E_ERR_INVALID_IMM_DATA_SIZE";
228 case I40E_ERR_TIMEOUT:
229 return "I40E_ERR_TIMEOUT";
230 case I40E_ERR_OPCODE_MISMATCH:
231 return "I40E_ERR_OPCODE_MISMATCH";
232 case I40E_ERR_CQP_COMPL_ERROR:
233 return "I40E_ERR_CQP_COMPL_ERROR";
234 case I40E_ERR_INVALID_VF_ID:
235 return "I40E_ERR_INVALID_VF_ID";
236 case I40E_ERR_INVALID_HMCFN_ID:
237 return "I40E_ERR_INVALID_HMCFN_ID";
238 case I40E_ERR_BACKING_PAGE_ERROR:
239 return "I40E_ERR_BACKING_PAGE_ERROR";
240 case I40E_ERR_NO_PBLCHUNKS_AVAILABLE:
241 return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE";
242 case I40E_ERR_INVALID_PBLE_INDEX:
243 return "I40E_ERR_INVALID_PBLE_INDEX";
244 case I40E_ERR_INVALID_SD_INDEX:
245 return "I40E_ERR_INVALID_SD_INDEX";
246 case I40E_ERR_INVALID_PAGE_DESC_INDEX:
247 return "I40E_ERR_INVALID_PAGE_DESC_INDEX";
248 case I40E_ERR_INVALID_SD_TYPE:
249 return "I40E_ERR_INVALID_SD_TYPE";
250 case I40E_ERR_MEMCPY_FAILED:
251 return "I40E_ERR_MEMCPY_FAILED";
252 case I40E_ERR_INVALID_HMC_OBJ_INDEX:
253 return "I40E_ERR_INVALID_HMC_OBJ_INDEX";
254 case I40E_ERR_INVALID_HMC_OBJ_COUNT:
255 return "I40E_ERR_INVALID_HMC_OBJ_COUNT";
256 case I40E_ERR_INVALID_SRQ_ARM_LIMIT:
257 return "I40E_ERR_INVALID_SRQ_ARM_LIMIT";
258 case I40E_ERR_SRQ_ENABLED:
259 return "I40E_ERR_SRQ_ENABLED";
260 case I40E_ERR_ADMIN_QUEUE_ERROR:
261 return "I40E_ERR_ADMIN_QUEUE_ERROR";
262 case I40E_ERR_ADMIN_QUEUE_TIMEOUT:
263 return "I40E_ERR_ADMIN_QUEUE_TIMEOUT";
264 case I40E_ERR_BUF_TOO_SHORT:
265 return "I40E_ERR_BUF_TOO_SHORT";
266 case I40E_ERR_ADMIN_QUEUE_FULL:
267 return "I40E_ERR_ADMIN_QUEUE_FULL";
268 case I40E_ERR_ADMIN_QUEUE_NO_WORK:
269 return "I40E_ERR_ADMIN_QUEUE_NO_WORK";
270 case I40E_ERR_BAD_IWARP_CQE:
271 return "I40E_ERR_BAD_IWARP_CQE";
272 case I40E_ERR_NVM_BLANK_MODE:
273 return "I40E_ERR_NVM_BLANK_MODE";
274 case I40E_ERR_NOT_IMPLEMENTED:
275 return "I40E_ERR_NOT_IMPLEMENTED";
276 case I40E_ERR_PE_DOORBELL_NOT_ENABLED:
277 return "I40E_ERR_PE_DOORBELL_NOT_ENABLED";
278 case I40E_ERR_DIAG_TEST_FAILED:
279 return "I40E_ERR_DIAG_TEST_FAILED";
280 case I40E_ERR_NOT_READY:
281 return "I40E_ERR_NOT_READY";
282 case I40E_NOT_SUPPORTED:
283 return "I40E_NOT_SUPPORTED";
284 case I40E_ERR_FIRMWARE_API_VERSION:
285 return "I40E_ERR_FIRMWARE_API_VERSION";
286 }
287
288 snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);
289 return hw->err_str;
290 }
291
292 /**
293 * i40evf_debug_aq
294 * @hw: debug mask related to admin queue
295 * @mask: debug mask
296 * @desc: pointer to admin queue descriptor
297 * @buffer: pointer to command buffer
298 * @buf_len: max length of buffer
299 *
300 * Dumps debug log about adminq command with descriptor contents.
301 **/
302 void i40evf_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
303 void *buffer, u16 buf_len)
304 {
305 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
306 u8 *buf = (u8 *)buffer;
307
308 if ((!(mask & hw->debug_mask)) || (desc == NULL))
309 return;
310
311 i40e_debug(hw, mask,
312 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
313 le16_to_cpu(aq_desc->opcode),
314 le16_to_cpu(aq_desc->flags),
315 le16_to_cpu(aq_desc->datalen),
316 le16_to_cpu(aq_desc->retval));
317 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
318 le32_to_cpu(aq_desc->cookie_high),
319 le32_to_cpu(aq_desc->cookie_low));
320 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
321 le32_to_cpu(aq_desc->params.internal.param0),
322 le32_to_cpu(aq_desc->params.internal.param1));
323 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
324 le32_to_cpu(aq_desc->params.external.addr_high),
325 le32_to_cpu(aq_desc->params.external.addr_low));
326
327 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
328 u16 len = le16_to_cpu(aq_desc->datalen);
329
330 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
331 if (buf_len < len)
332 len = buf_len;
333 /* write the full 16-byte chunks */
334 if (hw->debug_mask & mask) {
335 char prefix[20];
336
337 snprintf(prefix, 20,
338 "i40evf %02x:%02x.%x: \t0x",
339 hw->bus.bus_id,
340 hw->bus.device,
341 hw->bus.func);
342
343 print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET,
344 16, 1, buf, len, false);
345 }
346 }
347 }
348
349 /**
350 * i40evf_check_asq_alive
351 * @hw: pointer to the hw struct
352 *
353 * Returns true if Queue is enabled else false.
354 **/
355 bool i40evf_check_asq_alive(struct i40e_hw *hw)
356 {
357 if (hw->aq.asq.len)
358 return !!(rd32(hw, hw->aq.asq.len) &
359 I40E_VF_ATQLEN1_ATQENABLE_MASK);
360 else
361 return false;
362 }
363
364 /**
365 * i40evf_aq_queue_shutdown
366 * @hw: pointer to the hw struct
367 * @unloading: is the driver unloading itself
368 *
369 * Tell the Firmware that we're shutting down the AdminQ and whether
370 * or not the driver is unloading as well.
371 **/
372 i40e_status i40evf_aq_queue_shutdown(struct i40e_hw *hw,
373 bool unloading)
374 {
375 struct i40e_aq_desc desc;
376 struct i40e_aqc_queue_shutdown *cmd =
377 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
378 i40e_status status;
379
380 i40evf_fill_default_direct_cmd_desc(&desc,
381 i40e_aqc_opc_queue_shutdown);
382
383 if (unloading)
384 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
385 status = i40evf_asq_send_command(hw, &desc, NULL, 0, NULL);
386
387 return status;
388 }
389
390 /**
391 * i40e_aq_get_set_rss_lut
392 * @hw: pointer to the hardware structure
393 * @vsi_id: vsi fw index
394 * @pf_lut: for PF table set true, for VSI table set false
395 * @lut: pointer to the lut buffer provided by the caller
396 * @lut_size: size of the lut buffer
397 * @set: set true to set the table, false to get the table
398 *
399 * Internal function to get or set RSS look up table
400 **/
401 static i40e_status i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
402 u16 vsi_id, bool pf_lut,
403 u8 *lut, u16 lut_size,
404 bool set)
405 {
406 i40e_status status;
407 struct i40e_aq_desc desc;
408 struct i40e_aqc_get_set_rss_lut *cmd_resp =
409 (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;
410
411 if (set)
412 i40evf_fill_default_direct_cmd_desc(&desc,
413 i40e_aqc_opc_set_rss_lut);
414 else
415 i40evf_fill_default_direct_cmd_desc(&desc,
416 i40e_aqc_opc_get_rss_lut);
417
418 /* Indirect command */
419 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
420 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
421
422 cmd_resp->vsi_id =
423 cpu_to_le16((u16)((vsi_id <<
424 I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
425 I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
426 cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);
427
428 if (pf_lut)
429 cmd_resp->flags |= cpu_to_le16((u16)
430 ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
431 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
432 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
433 else
434 cmd_resp->flags |= cpu_to_le16((u16)
435 ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
436 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
437 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
438
439 status = i40evf_asq_send_command(hw, &desc, lut, lut_size, NULL);
440
441 return status;
442 }
443
444 /**
445 * i40evf_aq_get_rss_lut
446 * @hw: pointer to the hardware structure
447 * @vsi_id: vsi fw index
448 * @pf_lut: for PF table set true, for VSI table set false
449 * @lut: pointer to the lut buffer provided by the caller
450 * @lut_size: size of the lut buffer
451 *
452 * get the RSS lookup table, PF or VSI type
453 **/
454 i40e_status i40evf_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,
455 bool pf_lut, u8 *lut, u16 lut_size)
456 {
457 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
458 false);
459 }
460
461 /**
462 * i40evf_aq_set_rss_lut
463 * @hw: pointer to the hardware structure
464 * @vsi_id: vsi fw index
465 * @pf_lut: for PF table set true, for VSI table set false
466 * @lut: pointer to the lut buffer provided by the caller
467 * @lut_size: size of the lut buffer
468 *
469 * set the RSS lookup table, PF or VSI type
470 **/
471 i40e_status i40evf_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,
472 bool pf_lut, u8 *lut, u16 lut_size)
473 {
474 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);
475 }
476
477 /**
478 * i40e_aq_get_set_rss_key
479 * @hw: pointer to the hw struct
480 * @vsi_id: vsi fw index
481 * @key: pointer to key info struct
482 * @set: set true to set the key, false to get the key
483 *
484 * get the RSS key per VSI
485 **/
486 static i40e_status i40e_aq_get_set_rss_key(struct i40e_hw *hw,
487 u16 vsi_id,
488 struct i40e_aqc_get_set_rss_key_data *key,
489 bool set)
490 {
491 i40e_status status;
492 struct i40e_aq_desc desc;
493 struct i40e_aqc_get_set_rss_key *cmd_resp =
494 (struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
495 u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);
496
497 if (set)
498 i40evf_fill_default_direct_cmd_desc(&desc,
499 i40e_aqc_opc_set_rss_key);
500 else
501 i40evf_fill_default_direct_cmd_desc(&desc,
502 i40e_aqc_opc_get_rss_key);
503
504 /* Indirect command */
505 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
506 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
507
508 cmd_resp->vsi_id =
509 cpu_to_le16((u16)((vsi_id <<
510 I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
511 I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
512 cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);
513
514 status = i40evf_asq_send_command(hw, &desc, key, key_size, NULL);
515
516 return status;
517 }
518
519 /**
520 * i40evf_aq_get_rss_key
521 * @hw: pointer to the hw struct
522 * @vsi_id: vsi fw index
523 * @key: pointer to key info struct
524 *
525 **/
526 i40e_status i40evf_aq_get_rss_key(struct i40e_hw *hw,
527 u16 vsi_id,
528 struct i40e_aqc_get_set_rss_key_data *key)
529 {
530 return i40e_aq_get_set_rss_key(hw, vsi_id, key, false);
531 }
532
533 /**
534 * i40evf_aq_set_rss_key
535 * @hw: pointer to the hw struct
536 * @vsi_id: vsi fw index
537 * @key: pointer to key info struct
538 *
539 * set the RSS key per VSI
540 **/
541 i40e_status i40evf_aq_set_rss_key(struct i40e_hw *hw,
542 u16 vsi_id,
543 struct i40e_aqc_get_set_rss_key_data *key)
544 {
545 return i40e_aq_get_set_rss_key(hw, vsi_id, key, true);
546 }
547
548
549 /* The i40evf_ptype_lookup table is used to convert from the 8-bit ptype in the
550 * hardware to a bit-field that can be used by SW to more easily determine the
551 * packet type.
552 *
553 * Macros are used to shorten the table lines and make this table human
554 * readable.
555 *
556 * We store the PTYPE in the top byte of the bit field - this is just so that
557 * we can check that the table doesn't have a row missing, as the index into
558 * the table should be the PTYPE.
559 *
560 * Typical work flow:
561 *
562 * IF NOT i40evf_ptype_lookup[ptype].known
563 * THEN
564 * Packet is unknown
565 * ELSE IF i40evf_ptype_lookup[ptype].outer_ip == I40E_RX_PTYPE_OUTER_IP
566 * Use the rest of the fields to look at the tunnels, inner protocols, etc
567 * ELSE
568 * Use the enum i40e_rx_l2_ptype to decode the packet type
569 * ENDIF
570 */
571
572 /* macro to make the table lines short */
573 #define I40E_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\
574 { PTYPE, \
575 1, \
576 I40E_RX_PTYPE_OUTER_##OUTER_IP, \
577 I40E_RX_PTYPE_OUTER_##OUTER_IP_VER, \
578 I40E_RX_PTYPE_##OUTER_FRAG, \
579 I40E_RX_PTYPE_TUNNEL_##T, \
580 I40E_RX_PTYPE_TUNNEL_END_##TE, \
581 I40E_RX_PTYPE_##TEF, \
582 I40E_RX_PTYPE_INNER_PROT_##I, \
583 I40E_RX_PTYPE_PAYLOAD_LAYER_##PL }
584
585 #define I40E_PTT_UNUSED_ENTRY(PTYPE) \
586 { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
587
588 /* shorter macros makes the table fit but are terse */
589 #define I40E_RX_PTYPE_NOF I40E_RX_PTYPE_NOT_FRAG
590 #define I40E_RX_PTYPE_FRG I40E_RX_PTYPE_FRAG
591 #define I40E_RX_PTYPE_INNER_PROT_TS I40E_RX_PTYPE_INNER_PROT_TIMESYNC
592
593 /* Lookup table mapping the HW PTYPE to the bit field for decoding */
594 struct i40e_rx_ptype_decoded i40evf_ptype_lookup[] = {
595 /* L2 Packet types */
596 I40E_PTT_UNUSED_ENTRY(0),
597 I40E_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
598 I40E_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, TS, PAY2),
599 I40E_PTT(3, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
600 I40E_PTT_UNUSED_ENTRY(4),
601 I40E_PTT_UNUSED_ENTRY(5),
602 I40E_PTT(6, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
603 I40E_PTT(7, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
604 I40E_PTT_UNUSED_ENTRY(8),
605 I40E_PTT_UNUSED_ENTRY(9),
606 I40E_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
607 I40E_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
608 I40E_PTT(12, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
609 I40E_PTT(13, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
610 I40E_PTT(14, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
611 I40E_PTT(15, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
612 I40E_PTT(16, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
613 I40E_PTT(17, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
614 I40E_PTT(18, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
615 I40E_PTT(19, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
616 I40E_PTT(20, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
617 I40E_PTT(21, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
618
619 /* Non Tunneled IPv4 */
620 I40E_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
621 I40E_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
622 I40E_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4),
623 I40E_PTT_UNUSED_ENTRY(25),
624 I40E_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4),
625 I40E_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
626 I40E_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
627
628 /* IPv4 --> IPv4 */
629 I40E_PTT(29, IP, IPV4, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
630 I40E_PTT(30, IP, IPV4, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
631 I40E_PTT(31, IP, IPV4, NOF, IP_IP, IPV4, NOF, UDP, PAY4),
632 I40E_PTT_UNUSED_ENTRY(32),
633 I40E_PTT(33, IP, IPV4, NOF, IP_IP, IPV4, NOF, TCP, PAY4),
634 I40E_PTT(34, IP, IPV4, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
635 I40E_PTT(35, IP, IPV4, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
636
637 /* IPv4 --> IPv6 */
638 I40E_PTT(36, IP, IPV4, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
639 I40E_PTT(37, IP, IPV4, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
640 I40E_PTT(38, IP, IPV4, NOF, IP_IP, IPV6, NOF, UDP, PAY4),
641 I40E_PTT_UNUSED_ENTRY(39),
642 I40E_PTT(40, IP, IPV4, NOF, IP_IP, IPV6, NOF, TCP, PAY4),
643 I40E_PTT(41, IP, IPV4, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
644 I40E_PTT(42, IP, IPV4, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
645
646 /* IPv4 --> GRE/NAT */
647 I40E_PTT(43, IP, IPV4, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
648
649 /* IPv4 --> GRE/NAT --> IPv4 */
650 I40E_PTT(44, IP, IPV4, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
651 I40E_PTT(45, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
652 I40E_PTT(46, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4),
653 I40E_PTT_UNUSED_ENTRY(47),
654 I40E_PTT(48, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4),
655 I40E_PTT(49, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
656 I40E_PTT(50, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
657
658 /* IPv4 --> GRE/NAT --> IPv6 */
659 I40E_PTT(51, IP, IPV4, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
660 I40E_PTT(52, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
661 I40E_PTT(53, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4),
662 I40E_PTT_UNUSED_ENTRY(54),
663 I40E_PTT(55, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4),
664 I40E_PTT(56, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
665 I40E_PTT(57, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
666
667 /* IPv4 --> GRE/NAT --> MAC */
668 I40E_PTT(58, IP, IPV4, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
669
670 /* IPv4 --> GRE/NAT --> MAC --> IPv4 */
671 I40E_PTT(59, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
672 I40E_PTT(60, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
673 I40E_PTT(61, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4),
674 I40E_PTT_UNUSED_ENTRY(62),
675 I40E_PTT(63, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4),
676 I40E_PTT(64, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
677 I40E_PTT(65, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
678
679 /* IPv4 --> GRE/NAT -> MAC --> IPv6 */
680 I40E_PTT(66, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
681 I40E_PTT(67, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
682 I40E_PTT(68, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4),
683 I40E_PTT_UNUSED_ENTRY(69),
684 I40E_PTT(70, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4),
685 I40E_PTT(71, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
686 I40E_PTT(72, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
687
688 /* IPv4 --> GRE/NAT --> MAC/VLAN */
689 I40E_PTT(73, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
690
691 /* IPv4 ---> GRE/NAT -> MAC/VLAN --> IPv4 */
692 I40E_PTT(74, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
693 I40E_PTT(75, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
694 I40E_PTT(76, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4),
695 I40E_PTT_UNUSED_ENTRY(77),
696 I40E_PTT(78, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4),
697 I40E_PTT(79, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
698 I40E_PTT(80, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
699
700 /* IPv4 -> GRE/NAT -> MAC/VLAN --> IPv6 */
701 I40E_PTT(81, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
702 I40E_PTT(82, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
703 I40E_PTT(83, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4),
704 I40E_PTT_UNUSED_ENTRY(84),
705 I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
706 I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
707 I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
708
709 /* Non Tunneled IPv6 */
710 I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
711 I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
712 I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3),
713 I40E_PTT_UNUSED_ENTRY(91),
714 I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
715 I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),
716 I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),
717
718 /* IPv6 --> IPv4 */
719 I40E_PTT(95, IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
720 I40E_PTT(96, IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
721 I40E_PTT(97, IP, IPV6, NOF, IP_IP, IPV4, NOF, UDP, PAY4),
722 I40E_PTT_UNUSED_ENTRY(98),
723 I40E_PTT(99, IP, IPV6, NOF, IP_IP, IPV4, NOF, TCP, PAY4),
724 I40E_PTT(100, IP, IPV6, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
725 I40E_PTT(101, IP, IPV6, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
726
727 /* IPv6 --> IPv6 */
728 I40E_PTT(102, IP, IPV6, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
729 I40E_PTT(103, IP, IPV6, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
730 I40E_PTT(104, IP, IPV6, NOF, IP_IP, IPV6, NOF, UDP, PAY4),
731 I40E_PTT_UNUSED_ENTRY(105),
732 I40E_PTT(106, IP, IPV6, NOF, IP_IP, IPV6, NOF, TCP, PAY4),
733 I40E_PTT(107, IP, IPV6, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
734 I40E_PTT(108, IP, IPV6, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
735
736 /* IPv6 --> GRE/NAT */
737 I40E_PTT(109, IP, IPV6, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
738
739 /* IPv6 --> GRE/NAT -> IPv4 */
740 I40E_PTT(110, IP, IPV6, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
741 I40E_PTT(111, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
742 I40E_PTT(112, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4),
743 I40E_PTT_UNUSED_ENTRY(113),
744 I40E_PTT(114, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4),
745 I40E_PTT(115, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
746 I40E_PTT(116, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
747
748 /* IPv6 --> GRE/NAT -> IPv6 */
749 I40E_PTT(117, IP, IPV6, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
750 I40E_PTT(118, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
751 I40E_PTT(119, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4),
752 I40E_PTT_UNUSED_ENTRY(120),
753 I40E_PTT(121, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4),
754 I40E_PTT(122, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
755 I40E_PTT(123, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
756
757 /* IPv6 --> GRE/NAT -> MAC */
758 I40E_PTT(124, IP, IPV6, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
759
760 /* IPv6 --> GRE/NAT -> MAC -> IPv4 */
761 I40E_PTT(125, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
762 I40E_PTT(126, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
763 I40E_PTT(127, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4),
764 I40E_PTT_UNUSED_ENTRY(128),
765 I40E_PTT(129, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4),
766 I40E_PTT(130, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
767 I40E_PTT(131, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
768
769 /* IPv6 --> GRE/NAT -> MAC -> IPv6 */
770 I40E_PTT(132, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
771 I40E_PTT(133, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
772 I40E_PTT(134, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4),
773 I40E_PTT_UNUSED_ENTRY(135),
774 I40E_PTT(136, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4),
775 I40E_PTT(137, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
776 I40E_PTT(138, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
777
778 /* IPv6 --> GRE/NAT -> MAC/VLAN */
779 I40E_PTT(139, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
780
781 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv4 */
782 I40E_PTT(140, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
783 I40E_PTT(141, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
784 I40E_PTT(142, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4),
785 I40E_PTT_UNUSED_ENTRY(143),
786 I40E_PTT(144, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4),
787 I40E_PTT(145, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
788 I40E_PTT(146, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
789
790 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv6 */
791 I40E_PTT(147, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
792 I40E_PTT(148, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
793 I40E_PTT(149, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4),
794 I40E_PTT_UNUSED_ENTRY(150),
795 I40E_PTT(151, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
796 I40E_PTT(152, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
797 I40E_PTT(153, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
798
799 /* unused entries */
800 I40E_PTT_UNUSED_ENTRY(154),
801 I40E_PTT_UNUSED_ENTRY(155),
802 I40E_PTT_UNUSED_ENTRY(156),
803 I40E_PTT_UNUSED_ENTRY(157),
804 I40E_PTT_UNUSED_ENTRY(158),
805 I40E_PTT_UNUSED_ENTRY(159),
806
807 I40E_PTT_UNUSED_ENTRY(160),
808 I40E_PTT_UNUSED_ENTRY(161),
809 I40E_PTT_UNUSED_ENTRY(162),
810 I40E_PTT_UNUSED_ENTRY(163),
811 I40E_PTT_UNUSED_ENTRY(164),
812 I40E_PTT_UNUSED_ENTRY(165),
813 I40E_PTT_UNUSED_ENTRY(166),
814 I40E_PTT_UNUSED_ENTRY(167),
815 I40E_PTT_UNUSED_ENTRY(168),
816 I40E_PTT_UNUSED_ENTRY(169),
817
818 I40E_PTT_UNUSED_ENTRY(170),
819 I40E_PTT_UNUSED_ENTRY(171),
820 I40E_PTT_UNUSED_ENTRY(172),
821 I40E_PTT_UNUSED_ENTRY(173),
822 I40E_PTT_UNUSED_ENTRY(174),
823 I40E_PTT_UNUSED_ENTRY(175),
824 I40E_PTT_UNUSED_ENTRY(176),
825 I40E_PTT_UNUSED_ENTRY(177),
826 I40E_PTT_UNUSED_ENTRY(178),
827 I40E_PTT_UNUSED_ENTRY(179),
828
829 I40E_PTT_UNUSED_ENTRY(180),
830 I40E_PTT_UNUSED_ENTRY(181),
831 I40E_PTT_UNUSED_ENTRY(182),
832 I40E_PTT_UNUSED_ENTRY(183),
833 I40E_PTT_UNUSED_ENTRY(184),
834 I40E_PTT_UNUSED_ENTRY(185),
835 I40E_PTT_UNUSED_ENTRY(186),
836 I40E_PTT_UNUSED_ENTRY(187),
837 I40E_PTT_UNUSED_ENTRY(188),
838 I40E_PTT_UNUSED_ENTRY(189),
839
840 I40E_PTT_UNUSED_ENTRY(190),
841 I40E_PTT_UNUSED_ENTRY(191),
842 I40E_PTT_UNUSED_ENTRY(192),
843 I40E_PTT_UNUSED_ENTRY(193),
844 I40E_PTT_UNUSED_ENTRY(194),
845 I40E_PTT_UNUSED_ENTRY(195),
846 I40E_PTT_UNUSED_ENTRY(196),
847 I40E_PTT_UNUSED_ENTRY(197),
848 I40E_PTT_UNUSED_ENTRY(198),
849 I40E_PTT_UNUSED_ENTRY(199),
850
851 I40E_PTT_UNUSED_ENTRY(200),
852 I40E_PTT_UNUSED_ENTRY(201),
853 I40E_PTT_UNUSED_ENTRY(202),
854 I40E_PTT_UNUSED_ENTRY(203),
855 I40E_PTT_UNUSED_ENTRY(204),
856 I40E_PTT_UNUSED_ENTRY(205),
857 I40E_PTT_UNUSED_ENTRY(206),
858 I40E_PTT_UNUSED_ENTRY(207),
859 I40E_PTT_UNUSED_ENTRY(208),
860 I40E_PTT_UNUSED_ENTRY(209),
861
862 I40E_PTT_UNUSED_ENTRY(210),
863 I40E_PTT_UNUSED_ENTRY(211),
864 I40E_PTT_UNUSED_ENTRY(212),
865 I40E_PTT_UNUSED_ENTRY(213),
866 I40E_PTT_UNUSED_ENTRY(214),
867 I40E_PTT_UNUSED_ENTRY(215),
868 I40E_PTT_UNUSED_ENTRY(216),
869 I40E_PTT_UNUSED_ENTRY(217),
870 I40E_PTT_UNUSED_ENTRY(218),
871 I40E_PTT_UNUSED_ENTRY(219),
872
873 I40E_PTT_UNUSED_ENTRY(220),
874 I40E_PTT_UNUSED_ENTRY(221),
875 I40E_PTT_UNUSED_ENTRY(222),
876 I40E_PTT_UNUSED_ENTRY(223),
877 I40E_PTT_UNUSED_ENTRY(224),
878 I40E_PTT_UNUSED_ENTRY(225),
879 I40E_PTT_UNUSED_ENTRY(226),
880 I40E_PTT_UNUSED_ENTRY(227),
881 I40E_PTT_UNUSED_ENTRY(228),
882 I40E_PTT_UNUSED_ENTRY(229),
883
884 I40E_PTT_UNUSED_ENTRY(230),
885 I40E_PTT_UNUSED_ENTRY(231),
886 I40E_PTT_UNUSED_ENTRY(232),
887 I40E_PTT_UNUSED_ENTRY(233),
888 I40E_PTT_UNUSED_ENTRY(234),
889 I40E_PTT_UNUSED_ENTRY(235),
890 I40E_PTT_UNUSED_ENTRY(236),
891 I40E_PTT_UNUSED_ENTRY(237),
892 I40E_PTT_UNUSED_ENTRY(238),
893 I40E_PTT_UNUSED_ENTRY(239),
894
895 I40E_PTT_UNUSED_ENTRY(240),
896 I40E_PTT_UNUSED_ENTRY(241),
897 I40E_PTT_UNUSED_ENTRY(242),
898 I40E_PTT_UNUSED_ENTRY(243),
899 I40E_PTT_UNUSED_ENTRY(244),
900 I40E_PTT_UNUSED_ENTRY(245),
901 I40E_PTT_UNUSED_ENTRY(246),
902 I40E_PTT_UNUSED_ENTRY(247),
903 I40E_PTT_UNUSED_ENTRY(248),
904 I40E_PTT_UNUSED_ENTRY(249),
905
906 I40E_PTT_UNUSED_ENTRY(250),
907 I40E_PTT_UNUSED_ENTRY(251),
908 I40E_PTT_UNUSED_ENTRY(252),
909 I40E_PTT_UNUSED_ENTRY(253),
910 I40E_PTT_UNUSED_ENTRY(254),
911 I40E_PTT_UNUSED_ENTRY(255)
912 };
913
914 /**
915 * i40evf_aq_rx_ctl_read_register - use FW to read from an Rx control register
916 * @hw: pointer to the hw struct
917 * @reg_addr: register address
918 * @reg_val: ptr to register value
919 * @cmd_details: pointer to command details structure or NULL
920 *
921 * Use the firmware to read the Rx control register,
922 * especially useful if the Rx unit is under heavy pressure
923 **/
924 i40e_status i40evf_aq_rx_ctl_read_register(struct i40e_hw *hw,
925 u32 reg_addr, u32 *reg_val,
926 struct i40e_asq_cmd_details *cmd_details)
927 {
928 struct i40e_aq_desc desc;
929 struct i40e_aqc_rx_ctl_reg_read_write *cmd_resp =
930 (struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
931 i40e_status status;
932
933 if (!reg_val)
934 return I40E_ERR_PARAM;
935
936 i40evf_fill_default_direct_cmd_desc(&desc,
937 i40e_aqc_opc_rx_ctl_reg_read);
938
939 cmd_resp->address = cpu_to_le32(reg_addr);
940
941 status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
942
943 if (status == 0)
944 *reg_val = le32_to_cpu(cmd_resp->value);
945
946 return status;
947 }
948
949 /**
950 * i40evf_read_rx_ctl - read from an Rx control register
951 * @hw: pointer to the hw struct
952 * @reg_addr: register address
953 **/
954 u32 i40evf_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
955 {
956 i40e_status status = 0;
957 bool use_register;
958 int retry = 5;
959 u32 val = 0;
960
961 use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
962 if (!use_register) {
963 do_retry:
964 status = i40evf_aq_rx_ctl_read_register(hw, reg_addr,
965 &val, NULL);
966 if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
967 usleep_range(1000, 2000);
968 retry--;
969 goto do_retry;
970 }
971 }
972
973 /* if the AQ access failed, try the old-fashioned way */
974 if (status || use_register)
975 val = rd32(hw, reg_addr);
976
977 return val;
978 }
979
980 /**
981 * i40evf_aq_rx_ctl_write_register
982 * @hw: pointer to the hw struct
983 * @reg_addr: register address
984 * @reg_val: register value
985 * @cmd_details: pointer to command details structure or NULL
986 *
987 * Use the firmware to write to an Rx control register,
988 * especially useful if the Rx unit is under heavy pressure
989 **/
990 i40e_status i40evf_aq_rx_ctl_write_register(struct i40e_hw *hw,
991 u32 reg_addr, u32 reg_val,
992 struct i40e_asq_cmd_details *cmd_details)
993 {
994 struct i40e_aq_desc desc;
995 struct i40e_aqc_rx_ctl_reg_read_write *cmd =
996 (struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
997 i40e_status status;
998
999 i40evf_fill_default_direct_cmd_desc(&desc,
1000 i40e_aqc_opc_rx_ctl_reg_write);
1001
1002 cmd->address = cpu_to_le32(reg_addr);
1003 cmd->value = cpu_to_le32(reg_val);
1004
1005 status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1006
1007 return status;
1008 }
1009
1010 /**
1011 * i40evf_write_rx_ctl - write to an Rx control register
1012 * @hw: pointer to the hw struct
1013 * @reg_addr: register address
1014 * @reg_val: register value
1015 **/
1016 void i40evf_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
1017 {
1018 i40e_status status = 0;
1019 bool use_register;
1020 int retry = 5;
1021
1022 use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
1023 if (!use_register) {
1024 do_retry:
1025 status = i40evf_aq_rx_ctl_write_register(hw, reg_addr,
1026 reg_val, NULL);
1027 if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
1028 usleep_range(1000, 2000);
1029 retry--;
1030 goto do_retry;
1031 }
1032 }
1033
1034 /* if the AQ access failed, try the old-fashioned way */
1035 if (status || use_register)
1036 wr32(hw, reg_addr, reg_val);
1037 }
1038
1039 /**
1040 * i40e_aq_send_msg_to_pf
1041 * @hw: pointer to the hardware structure
1042 * @v_opcode: opcodes for VF-PF communication
1043 * @v_retval: return error code
1044 * @msg: pointer to the msg buffer
1045 * @msglen: msg length
1046 * @cmd_details: pointer to command details
1047 *
1048 * Send message to PF driver using admin queue. By default, this message
1049 * is sent asynchronously, i.e. i40evf_asq_send_command() does not wait for
1050 * completion before returning.
1051 **/
1052 i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
1053 enum i40e_virtchnl_ops v_opcode,
1054 i40e_status v_retval,
1055 u8 *msg, u16 msglen,
1056 struct i40e_asq_cmd_details *cmd_details)
1057 {
1058 struct i40e_aq_desc desc;
1059 struct i40e_asq_cmd_details details;
1060 i40e_status status;
1061
1062 i40evf_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_pf);
1063 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1064 desc.cookie_high = cpu_to_le32(v_opcode);
1065 desc.cookie_low = cpu_to_le32(v_retval);
1066 if (msglen) {
1067 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF
1068 | I40E_AQ_FLAG_RD));
1069 if (msglen > I40E_AQ_LARGE_BUF)
1070 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1071 desc.datalen = cpu_to_le16(msglen);
1072 }
1073 if (!cmd_details) {
1074 memset(&details, 0, sizeof(details));
1075 details.async = true;
1076 cmd_details = &details;
1077 }
1078 status = i40evf_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1079 return status;
1080 }
1081
1082 /**
1083 * i40e_vf_parse_hw_config
1084 * @hw: pointer to the hardware structure
1085 * @msg: pointer to the virtual channel VF resource structure
1086 *
1087 * Given a VF resource message from the PF, populate the hw struct
1088 * with appropriate information.
1089 **/
1090 void i40e_vf_parse_hw_config(struct i40e_hw *hw,
1091 struct i40e_virtchnl_vf_resource *msg)
1092 {
1093 struct i40e_virtchnl_vsi_resource *vsi_res;
1094 int i;
1095
1096 vsi_res = &msg->vsi_res[0];
1097
1098 hw->dev_caps.num_vsis = msg->num_vsis;
1099 hw->dev_caps.num_rx_qp = msg->num_queue_pairs;
1100 hw->dev_caps.num_tx_qp = msg->num_queue_pairs;
1101 hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;
1102 hw->dev_caps.dcb = msg->vf_offload_flags &
1103 I40E_VIRTCHNL_VF_OFFLOAD_L2;
1104 hw->dev_caps.fcoe = (msg->vf_offload_flags &
1105 I40E_VIRTCHNL_VF_OFFLOAD_FCOE) ? 1 : 0;
1106 for (i = 0; i < msg->num_vsis; i++) {
1107 if (vsi_res->vsi_type == I40E_VSI_SRIOV) {
1108 ether_addr_copy(hw->mac.perm_addr,
1109 vsi_res->default_mac_addr);
1110 ether_addr_copy(hw->mac.addr,
1111 vsi_res->default_mac_addr);
1112 }
1113 vsi_res++;
1114 }
1115 }
1116
1117 /**
1118 * i40e_vf_reset
1119 * @hw: pointer to the hardware structure
1120 *
1121 * Send a VF_RESET message to the PF. Does not wait for response from PF
1122 * as none will be forthcoming. Immediately after calling this function,
1123 * the admin queue should be shut down and (optionally) reinitialized.
1124 **/
1125 i40e_status i40e_vf_reset(struct i40e_hw *hw)
1126 {
1127 return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,
1128 0, NULL, 0, NULL);
1129 }
Linux with added FPC-III support