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x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / pci / hotplug / cpqphp_core.c
blob33d300d124110b07f4c5d987937c4d38b4e69f08
1 /*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com>
29 */
30
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/kernel.h>
34 #include <linux/types.h>
35 #include <linux/proc_fs.h>
36 #include <linux/slab.h>
37 #include <linux/workqueue.h>
38 #include <linux/pci.h>
39 #include <linux/pci_hotplug.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42
43 #include <linux/uaccess.h>
44
45 #include "cpqphp.h"
46 #include "cpqphp_nvram.h"
47
48
49 /* Global variables */
50 int cpqhp_debug;
51 int cpqhp_legacy_mode;
52 struct controller *cpqhp_ctrl_list; /* = NULL */
53 struct pci_func *cpqhp_slot_list[256];
54 struct irq_routing_table *cpqhp_routing_table;
55
56 /* local variables */
57 static void __iomem *smbios_table;
58 static void __iomem *smbios_start;
59 static void __iomem *cpqhp_rom_start;
60 static bool power_mode;
61 static bool debug;
62 static int initialized;
63
64 #define DRIVER_VERSION "0.9.8"
65 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
67
68 MODULE_AUTHOR(DRIVER_AUTHOR);
69 MODULE_DESCRIPTION(DRIVER_DESC);
70 MODULE_LICENSE("GPL");
71
72 module_param(power_mode, bool, 0644);
73 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
74
75 module_param(debug, bool, 0644);
76 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
77
78 #define CPQHPC_MODULE_MINOR 208
79
80 static inline int is_slot64bit(struct slot *slot)
81 {
82 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
83 }
84
85 static inline int is_slot66mhz(struct slot *slot)
86 {
87 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
88 }
89
90 /**
91 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
92 * @begin: begin pointer for region to be scanned.
93 * @end: end pointer for region to be scanned.
94 *
95 * Returns pointer to the head of the SMBIOS tables (or %NULL).
96 */
97 static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
98 {
99 void __iomem *fp;
100 void __iomem *endp;
101 u8 temp1, temp2, temp3, temp4;
102 int status = 0;
103
104 endp = (end - sizeof(u32) + 1);
105
106 for (fp = begin; fp <= endp; fp += 16) {
107 temp1 = readb(fp);
108 temp2 = readb(fp+1);
109 temp3 = readb(fp+2);
110 temp4 = readb(fp+3);
111 if (temp1 == '_' &&
112 temp2 == 'S' &&
113 temp3 == 'M' &&
114 temp4 == '_') {
115 status = 1;
116 break;
117 }
118 }
119
120 if (!status)
121 fp = NULL;
122
123 dbg("Discovered SMBIOS Entry point at %p\n", fp);
124
125 return fp;
126 }
127
128 /**
129 * init_SERR - Initializes the per slot SERR generation.
130 * @ctrl: controller to use
131 *
132 * For unexpected switch opens
133 */
134 static int init_SERR(struct controller *ctrl)
135 {
136 u32 tempdword;
137 u32 number_of_slots;
138 u8 physical_slot;
139
140 if (!ctrl)
141 return 1;
142
143 tempdword = ctrl->first_slot;
144
145 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
146 /* Loop through slots */
147 while (number_of_slots) {
148 physical_slot = tempdword;
149 writeb(0, ctrl->hpc_reg + SLOT_SERR);
150 tempdword++;
151 number_of_slots--;
152 }
153
154 return 0;
155 }
156
157 static int init_cpqhp_routing_table(void)
158 {
159 int len;
160
161 cpqhp_routing_table = pcibios_get_irq_routing_table();
162 if (cpqhp_routing_table == NULL)
163 return -ENOMEM;
164
165 len = cpqhp_routing_table_length();
166 if (len == 0) {
167 kfree(cpqhp_routing_table);
168 cpqhp_routing_table = NULL;
169 return -1;
170 }
171
172 return 0;
173 }
174
175 /* nice debugging output */
176 static void pci_print_IRQ_route(void)
177 {
178 int len;
179 int loop;
180 u8 tbus, tdevice, tslot;
181
182 len = cpqhp_routing_table_length();
183
184 dbg("bus dev func slot\n");
185 for (loop = 0; loop < len; ++loop) {
186 tbus = cpqhp_routing_table->slots[loop].bus;
187 tdevice = cpqhp_routing_table->slots[loop].devfn;
188 tslot = cpqhp_routing_table->slots[loop].slot;
189 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
190
191 }
192 return;
193 }
194
195
196 /**
197 * get_subsequent_smbios_entry: get the next entry from bios table.
198 * @smbios_start: where to start in the SMBIOS table
199 * @smbios_table: location of the SMBIOS table
200 * @curr: %NULL or pointer to previously returned structure
201 *
202 * Gets the first entry if previous == NULL;
203 * otherwise, returns the next entry.
204 * Uses global SMBIOS Table pointer.
205 *
206 * Returns a pointer to an SMBIOS structure or NULL if none found.
207 */
208 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
209 void __iomem *smbios_table,
210 void __iomem *curr)
211 {
212 u8 bail = 0;
213 u8 previous_byte = 1;
214 void __iomem *p_temp;
215 void __iomem *p_max;
216
217 if (!smbios_table || !curr)
218 return NULL;
219
220 /* set p_max to the end of the table */
221 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
222
223 p_temp = curr;
224 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
225
226 while ((p_temp < p_max) && !bail) {
227 /* Look for the double NULL terminator
228 * The first condition is the previous byte
229 * and the second is the curr
230 */
231 if (!previous_byte && !(readb(p_temp)))
232 bail = 1;
233
234 previous_byte = readb(p_temp);
235 p_temp++;
236 }
237
238 if (p_temp < p_max)
239 return p_temp;
240 else
241 return NULL;
242 }
243
244
245 /**
246 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
247 * @smbios_start: where to start in the SMBIOS table
248 * @smbios_table: location of the SMBIOS table
249 * @type: SMBIOS structure type to be returned
250 * @previous: %NULL or pointer to previously returned structure
251 *
252 * Gets the first entry of the specified type if previous == %NULL;
253 * Otherwise, returns the next entry of the given type.
254 * Uses global SMBIOS Table pointer.
255 * Uses get_subsequent_smbios_entry.
256 *
257 * Returns a pointer to an SMBIOS structure or %NULL if none found.
258 */
259 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
260 void __iomem *smbios_table,
261 u8 type,
262 void __iomem *previous)
263 {
264 if (!smbios_table)
265 return NULL;
266
267 if (!previous)
268 previous = smbios_start;
269 else
270 previous = get_subsequent_smbios_entry(smbios_start,
271 smbios_table, previous);
272
273 while (previous)
274 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
275 previous = get_subsequent_smbios_entry(smbios_start,
276 smbios_table, previous);
277 else
278 break;
279
280 return previous;
281 }
282
283 static void release_slot(struct hotplug_slot *hotplug_slot)
284 {
285 struct slot *slot = hotplug_slot->private;
286
287 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
288
289 kfree(slot->hotplug_slot->info);
290 kfree(slot->hotplug_slot);
291 kfree(slot);
292 }
293
294 static int ctrl_slot_cleanup(struct controller *ctrl)
295 {
296 struct slot *old_slot, *next_slot;
297
298 old_slot = ctrl->slot;
299 ctrl->slot = NULL;
300
301 while (old_slot) {
302 /* memory will be freed by the release_slot callback */
303 next_slot = old_slot->next;
304 pci_hp_deregister(old_slot->hotplug_slot);
305 old_slot = next_slot;
306 }
307
308 cpqhp_remove_debugfs_files(ctrl);
309
310 /* Free IRQ associated with hot plug device */
311 free_irq(ctrl->interrupt, ctrl);
312 /* Unmap the memory */
313 iounmap(ctrl->hpc_reg);
314 /* Finally reclaim PCI mem */
315 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
316 pci_resource_len(ctrl->pci_dev, 0));
317
318 return 0;
319 }
320
321
322 /**
323 * get_slot_mapping - determine logical slot mapping for PCI device
324 *
325 * Won't work for more than one PCI-PCI bridge in a slot.
326 *
327 * @bus_num - bus number of PCI device
328 * @dev_num - device number of PCI device
329 * @slot - Pointer to u8 where slot number will be returned
330 *
331 * Output: SUCCESS or FAILURE
332 */
333 static int
334 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
335 {
336 u32 work;
337 long len;
338 long loop;
339
340 u8 tbus, tdevice, tslot, bridgeSlot;
341
342 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
343
344 bridgeSlot = 0xFF;
345
346 len = cpqhp_routing_table_length();
347 for (loop = 0; loop < len; ++loop) {
348 tbus = cpqhp_routing_table->slots[loop].bus;
349 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
350 tslot = cpqhp_routing_table->slots[loop].slot;
351
352 if ((tbus == bus_num) && (tdevice == dev_num)) {
353 *slot = tslot;
354 return 0;
355 } else {
356 /* Did not get a match on the target PCI device. Check
357 * if the current IRQ table entry is a PCI-to-PCI
358 * bridge device. If so, and it's secondary bus
359 * matches the bus number for the target device, I need
360 * to save the bridge's slot number. If I can not find
361 * an entry for the target device, I will have to
362 * assume it's on the other side of the bridge, and
363 * assign it the bridge's slot.
364 */
365 bus->number = tbus;
366 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
367 PCI_CLASS_REVISION, &work);
368
369 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
370 pci_bus_read_config_dword(bus,
371 PCI_DEVFN(tdevice, 0),
372 PCI_PRIMARY_BUS, &work);
373 // See if bridge's secondary bus matches target bus.
374 if (((work >> 8) & 0x000000FF) == (long) bus_num)
375 bridgeSlot = tslot;
376 }
377 }
378
379 }
380
381 /* If we got here, we didn't find an entry in the IRQ mapping table for
382 * the target PCI device. If we did determine that the target device
383 * is on the other side of a PCI-to-PCI bridge, return the slot number
384 * for the bridge.
385 */
386 if (bridgeSlot != 0xFF) {
387 *slot = bridgeSlot;
388 return 0;
389 }
390 /* Couldn't find an entry in the routing table for this PCI device */
391 return -1;
392 }
393
394
395 /**
396 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
397 * @ctrl: struct controller to use
398 * @func: PCI device/function info
399 * @status: LED control flag: 1 = LED on, 0 = LED off
400 */
401 static int
402 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
403 u32 status)
404 {
405 u8 hp_slot;
406
407 if (func == NULL)
408 return 1;
409
410 hp_slot = func->device - ctrl->slot_device_offset;
411
412 /* Wait for exclusive access to hardware */
413 mutex_lock(&ctrl->crit_sect);
414
415 if (status == 1)
416 amber_LED_on(ctrl, hp_slot);
417 else if (status == 0)
418 amber_LED_off(ctrl, hp_slot);
419 else {
420 /* Done with exclusive hardware access */
421 mutex_unlock(&ctrl->crit_sect);
422 return 1;
423 }
424
425 set_SOGO(ctrl);
426
427 /* Wait for SOBS to be unset */
428 wait_for_ctrl_irq(ctrl);
429
430 /* Done with exclusive hardware access */
431 mutex_unlock(&ctrl->crit_sect);
432
433 return 0;
434 }
435
436
437 /**
438 * set_attention_status - Turns the Amber LED for a slot on or off
439 * @hotplug_slot: slot to change LED on
440 * @status: LED control flag
441 */
442 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
443 {
444 struct pci_func *slot_func;
445 struct slot *slot = hotplug_slot->private;
446 struct controller *ctrl = slot->ctrl;
447 u8 bus;
448 u8 devfn;
449 u8 device;
450 u8 function;
451
452 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
453
454 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
455 return -ENODEV;
456
457 device = devfn >> 3;
458 function = devfn & 0x7;
459 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
460
461 slot_func = cpqhp_slot_find(bus, device, function);
462 if (!slot_func)
463 return -ENODEV;
464
465 return cpqhp_set_attention_status(ctrl, slot_func, status);
466 }
467
468
469 static int process_SI(struct hotplug_slot *hotplug_slot)
470 {
471 struct pci_func *slot_func;
472 struct slot *slot = hotplug_slot->private;
473 struct controller *ctrl = slot->ctrl;
474 u8 bus;
475 u8 devfn;
476 u8 device;
477 u8 function;
478
479 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
480
481 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
482 return -ENODEV;
483
484 device = devfn >> 3;
485 function = devfn & 0x7;
486 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
487
488 slot_func = cpqhp_slot_find(bus, device, function);
489 if (!slot_func)
490 return -ENODEV;
491
492 slot_func->bus = bus;
493 slot_func->device = device;
494 slot_func->function = function;
495 slot_func->configured = 0;
496 dbg("board_added(%p, %p)\n", slot_func, ctrl);
497 return cpqhp_process_SI(ctrl, slot_func);
498 }
499
500
501 static int process_SS(struct hotplug_slot *hotplug_slot)
502 {
503 struct pci_func *slot_func;
504 struct slot *slot = hotplug_slot->private;
505 struct controller *ctrl = slot->ctrl;
506 u8 bus;
507 u8 devfn;
508 u8 device;
509 u8 function;
510
511 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
512
513 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
514 return -ENODEV;
515
516 device = devfn >> 3;
517 function = devfn & 0x7;
518 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
519
520 slot_func = cpqhp_slot_find(bus, device, function);
521 if (!slot_func)
522 return -ENODEV;
523
524 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
525 return cpqhp_process_SS(ctrl, slot_func);
526 }
527
528
529 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
530 {
531 struct slot *slot = hotplug_slot->private;
532 struct controller *ctrl = slot->ctrl;
533
534 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
535
536 return cpqhp_hardware_test(ctrl, value);
537 }
538
539
540 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
541 {
542 struct slot *slot = hotplug_slot->private;
543 struct controller *ctrl = slot->ctrl;
544
545 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
546
547 *value = get_slot_enabled(ctrl, slot);
548 return 0;
549 }
550
551 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
552 {
553 struct slot *slot = hotplug_slot->private;
554 struct controller *ctrl = slot->ctrl;
555
556 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
557
558 *value = cpq_get_attention_status(ctrl, slot);
559 return 0;
560 }
561
562 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
563 {
564 struct slot *slot = hotplug_slot->private;
565 struct controller *ctrl = slot->ctrl;
566
567 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
568
569 *value = cpq_get_latch_status(ctrl, slot);
570
571 return 0;
572 }
573
574 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
575 {
576 struct slot *slot = hotplug_slot->private;
577 struct controller *ctrl = slot->ctrl;
578
579 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
580
581 *value = get_presence_status(ctrl, slot);
582
583 return 0;
584 }
585
586 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
587 .set_attention_status = set_attention_status,
588 .enable_slot = process_SI,
589 .disable_slot = process_SS,
590 .hardware_test = hardware_test,
591 .get_power_status = get_power_status,
592 .get_attention_status = get_attention_status,
593 .get_latch_status = get_latch_status,
594 .get_adapter_status = get_adapter_status,
595 };
596
597 #define SLOT_NAME_SIZE 10
598
599 static int ctrl_slot_setup(struct controller *ctrl,
600 void __iomem *smbios_start,
601 void __iomem *smbios_table)
602 {
603 struct slot *slot;
604 struct hotplug_slot *hotplug_slot;
605 struct hotplug_slot_info *hotplug_slot_info;
606 struct pci_bus *bus = ctrl->pci_bus;
607 u8 number_of_slots;
608 u8 slot_device;
609 u8 slot_number;
610 u8 ctrl_slot;
611 u32 tempdword;
612 char name[SLOT_NAME_SIZE];
613 void __iomem *slot_entry = NULL;
614 int result;
615
616 dbg("%s\n", __func__);
617
618 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
619
620 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
621 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
622 slot_number = ctrl->first_slot;
623
624 while (number_of_slots) {
625 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
626 if (!slot) {
627 result = -ENOMEM;
628 goto error;
629 }
630
631 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
632 GFP_KERNEL);
633 if (!slot->hotplug_slot) {
634 result = -ENOMEM;
635 goto error_slot;
636 }
637 hotplug_slot = slot->hotplug_slot;
638
639 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
640 GFP_KERNEL);
641 if (!hotplug_slot->info) {
642 result = -ENOMEM;
643 goto error_hpslot;
644 }
645 hotplug_slot_info = hotplug_slot->info;
646
647 slot->ctrl = ctrl;
648 slot->bus = ctrl->bus;
649 slot->device = slot_device;
650 slot->number = slot_number;
651 dbg("slot->number = %u\n", slot->number);
652
653 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
654 slot_entry);
655
656 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
657 slot->number)) {
658 slot_entry = get_SMBIOS_entry(smbios_start,
659 smbios_table, 9, slot_entry);
660 }
661
662 slot->p_sm_slot = slot_entry;
663
664 init_timer(&slot->task_event);
665 slot->task_event.expires = jiffies + 5 * HZ;
666 slot->task_event.function = cpqhp_pushbutton_thread;
667
668 /*FIXME: these capabilities aren't used but if they are
669 * they need to be correctly implemented
670 */
671 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
672 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
673
674 if (is_slot64bit(slot))
675 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
676 if (is_slot66mhz(slot))
677 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
678 if (bus->cur_bus_speed == PCI_SPEED_66MHz)
679 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
680
681 ctrl_slot =
682 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
683
684 /* Check presence */
685 slot->capabilities |=
686 ((((~tempdword) >> 23) |
687 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
688 /* Check the switch state */
689 slot->capabilities |=
690 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
691 /* Check the slot enable */
692 slot->capabilities |=
693 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
694
695 /* register this slot with the hotplug pci core */
696 hotplug_slot->release = &release_slot;
697 hotplug_slot->private = slot;
698 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
699 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
700
701 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
702 hotplug_slot_info->attention_status =
703 cpq_get_attention_status(ctrl, slot);
704 hotplug_slot_info->latch_status =
705 cpq_get_latch_status(ctrl, slot);
706 hotplug_slot_info->adapter_status =
707 get_presence_status(ctrl, slot);
708
709 dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
710 slot->bus, slot->device,
711 slot->number, ctrl->slot_device_offset,
712 slot_number);
713 result = pci_hp_register(hotplug_slot,
714 ctrl->pci_dev->bus,
715 slot->device,
716 name);
717 if (result) {
718 err("pci_hp_register failed with error %d\n", result);
719 goto error_info;
720 }
721
722 slot->next = ctrl->slot;
723 ctrl->slot = slot;
724
725 number_of_slots--;
726 slot_device++;
727 slot_number++;
728 }
729
730 return 0;
731 error_info:
732 kfree(hotplug_slot_info);
733 error_hpslot:
734 kfree(hotplug_slot);
735 error_slot:
736 kfree(slot);
737 error:
738 return result;
739 }
740
741 static int one_time_init(void)
742 {
743 int loop;
744 int retval = 0;
745
746 if (initialized)
747 return 0;
748
749 power_mode = 0;
750
751 retval = init_cpqhp_routing_table();
752 if (retval)
753 goto error;
754
755 if (cpqhp_debug)
756 pci_print_IRQ_route();
757
758 dbg("Initialize + Start the notification mechanism\n");
759
760 retval = cpqhp_event_start_thread();
761 if (retval)
762 goto error;
763
764 dbg("Initialize slot lists\n");
765 for (loop = 0; loop < 256; loop++)
766 cpqhp_slot_list[loop] = NULL;
767
768 /* FIXME: We also need to hook the NMI handler eventually.
769 * this also needs to be worked with Christoph
770 * register_NMI_handler();
771 */
772 /* Map rom address */
773 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
774 if (!cpqhp_rom_start) {
775 err("Could not ioremap memory region for ROM\n");
776 retval = -EIO;
777 goto error;
778 }
779
780 /* Now, map the int15 entry point if we are on compaq specific
781 * hardware
782 */
783 compaq_nvram_init(cpqhp_rom_start);
784
785 /* Map smbios table entry point structure */
786 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
787 cpqhp_rom_start + ROM_PHY_LEN);
788 if (!smbios_table) {
789 err("Could not find the SMBIOS pointer in memory\n");
790 retval = -EIO;
791 goto error_rom_start;
792 }
793
794 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
795 readw(smbios_table + ST_LENGTH));
796 if (!smbios_start) {
797 err("Could not ioremap memory region taken from SMBIOS values\n");
798 retval = -EIO;
799 goto error_smbios_start;
800 }
801
802 initialized = 1;
803
804 return retval;
805
806 error_smbios_start:
807 iounmap(smbios_start);
808 error_rom_start:
809 iounmap(cpqhp_rom_start);
810 error:
811 return retval;
812 }
813
814 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
815 {
816 u8 num_of_slots = 0;
817 u8 hp_slot = 0;
818 u8 device;
819 u8 bus_cap;
820 u16 temp_word;
821 u16 vendor_id;
822 u16 subsystem_vid;
823 u16 subsystem_deviceid;
824 u32 rc;
825 struct controller *ctrl;
826 struct pci_func *func;
827 struct pci_bus *bus;
828 int err;
829
830 err = pci_enable_device(pdev);
831 if (err) {
832 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
833 pci_name(pdev), err);
834 return err;
835 }
836
837 bus = pdev->subordinate;
838 if (!bus) {
839 dev_notice(&pdev->dev, "the device is not a bridge, skipping\n");
840 rc = -ENODEV;
841 goto err_disable_device;
842 }
843
844 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
845 * discovery
846 */
847 vendor_id = pdev->vendor;
848 if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
849 (vendor_id != PCI_VENDOR_ID_INTEL)) {
850 err(msg_HPC_non_compaq_or_intel);
851 rc = -ENODEV;
852 goto err_disable_device;
853 }
854 dbg("Vendor ID: %x\n", vendor_id);
855
856 dbg("revision: %d\n", pdev->revision);
857 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
858 err(msg_HPC_rev_error);
859 rc = -ENODEV;
860 goto err_disable_device;
861 }
862
863 /* Check for the proper subsystem IDs
864 * Intel uses a different SSID programming model than Compaq.
865 * For Intel, each SSID bit identifies a PHP capability.
866 * Also Intel HPCs may have RID=0.
867 */
868 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
869 err(msg_HPC_not_supported);
870 rc = -ENODEV;
871 goto err_disable_device;
872 }
873
874 /* TODO: This code can be made to support non-Compaq or Intel
875 * subsystem IDs
876 */
877 subsystem_vid = pdev->subsystem_vendor;
878 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
879 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
880 err(msg_HPC_non_compaq_or_intel);
881 rc = -ENODEV;
882 goto err_disable_device;
883 }
884
885 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
886 if (!ctrl) {
887 err("%s : out of memory\n", __func__);
888 rc = -ENOMEM;
889 goto err_disable_device;
890 }
891
892 subsystem_deviceid = pdev->subsystem_device;
893
894 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
895
896 /* Set Vendor ID, so it can be accessed later from other
897 * functions
898 */
899 ctrl->vendor_id = vendor_id;
900
901 switch (subsystem_vid) {
902 case PCI_VENDOR_ID_COMPAQ:
903 if (pdev->revision >= 0x13) { /* CIOBX */
904 ctrl->push_flag = 1;
905 ctrl->slot_switch_type = 1;
906 ctrl->push_button = 1;
907 ctrl->pci_config_space = 1;
908 ctrl->defeature_PHP = 1;
909 ctrl->pcix_support = 1;
910 ctrl->pcix_speed_capability = 1;
911 pci_read_config_byte(pdev, 0x41, &bus_cap);
912 if (bus_cap & 0x80) {
913 dbg("bus max supports 133MHz PCI-X\n");
914 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
915 break;
916 }
917 if (bus_cap & 0x40) {
918 dbg("bus max supports 100MHz PCI-X\n");
919 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
920 break;
921 }
922 if (bus_cap & 0x20) {
923 dbg("bus max supports 66MHz PCI-X\n");
924 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
925 break;
926 }
927 if (bus_cap & 0x10) {
928 dbg("bus max supports 66MHz PCI\n");
929 bus->max_bus_speed = PCI_SPEED_66MHz;
930 break;
931 }
932
933 break;
934 }
935
936 switch (subsystem_deviceid) {
937 case PCI_SUB_HPC_ID:
938 /* Original 6500/7000 implementation */
939 ctrl->slot_switch_type = 1;
940 bus->max_bus_speed = PCI_SPEED_33MHz;
941 ctrl->push_button = 0;
942 ctrl->pci_config_space = 1;
943 ctrl->defeature_PHP = 1;
944 ctrl->pcix_support = 0;
945 ctrl->pcix_speed_capability = 0;
946 break;
947 case PCI_SUB_HPC_ID2:
948 /* First Pushbutton implementation */
949 ctrl->push_flag = 1;
950 ctrl->slot_switch_type = 1;
951 bus->max_bus_speed = PCI_SPEED_33MHz;
952 ctrl->push_button = 1;
953 ctrl->pci_config_space = 1;
954 ctrl->defeature_PHP = 1;
955 ctrl->pcix_support = 0;
956 ctrl->pcix_speed_capability = 0;
957 break;
958 case PCI_SUB_HPC_ID_INTC:
959 /* Third party (6500/7000) */
960 ctrl->slot_switch_type = 1;
961 bus->max_bus_speed = PCI_SPEED_33MHz;
962 ctrl->push_button = 0;
963 ctrl->pci_config_space = 1;
964 ctrl->defeature_PHP = 1;
965 ctrl->pcix_support = 0;
966 ctrl->pcix_speed_capability = 0;
967 break;
968 case PCI_SUB_HPC_ID3:
969 /* First 66 Mhz implementation */
970 ctrl->push_flag = 1;
971 ctrl->slot_switch_type = 1;
972 bus->max_bus_speed = PCI_SPEED_66MHz;
973 ctrl->push_button = 1;
974 ctrl->pci_config_space = 1;
975 ctrl->defeature_PHP = 1;
976 ctrl->pcix_support = 0;
977 ctrl->pcix_speed_capability = 0;
978 break;
979 case PCI_SUB_HPC_ID4:
980 /* First PCI-X implementation, 100MHz */
981 ctrl->push_flag = 1;
982 ctrl->slot_switch_type = 1;
983 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
984 ctrl->push_button = 1;
985 ctrl->pci_config_space = 1;
986 ctrl->defeature_PHP = 1;
987 ctrl->pcix_support = 1;
988 ctrl->pcix_speed_capability = 0;
989 break;
990 default:
991 err(msg_HPC_not_supported);
992 rc = -ENODEV;
993 goto err_free_ctrl;
994 }
995 break;
996
997 case PCI_VENDOR_ID_INTEL:
998 /* Check for speed capability (0=33, 1=66) */
999 if (subsystem_deviceid & 0x0001)
1000 bus->max_bus_speed = PCI_SPEED_66MHz;
1001 else
1002 bus->max_bus_speed = PCI_SPEED_33MHz;
1003
1004 /* Check for push button */
1005 if (subsystem_deviceid & 0x0002)
1006 ctrl->push_button = 0;
1007 else
1008 ctrl->push_button = 1;
1009
1010 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
1011 if (subsystem_deviceid & 0x0004)
1012 ctrl->slot_switch_type = 0;
1013 else
1014 ctrl->slot_switch_type = 1;
1015
1016 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
1017 if (subsystem_deviceid & 0x0008)
1018 ctrl->defeature_PHP = 1; /* PHP supported */
1019 else
1020 ctrl->defeature_PHP = 0; /* PHP not supported */
1021
1022 /* Alternate Base Address Register Interface
1023 * (0=not supported, 1=supported)
1024 */
1025 if (subsystem_deviceid & 0x0010)
1026 ctrl->alternate_base_address = 1;
1027 else
1028 ctrl->alternate_base_address = 0;
1029
1030 /* PCI Config Space Index (0=not supported, 1=supported) */
1031 if (subsystem_deviceid & 0x0020)
1032 ctrl->pci_config_space = 1;
1033 else
1034 ctrl->pci_config_space = 0;
1035
1036 /* PCI-X support */
1037 if (subsystem_deviceid & 0x0080) {
1038 ctrl->pcix_support = 1;
1039 if (subsystem_deviceid & 0x0040)
1040 /* 133MHz PCI-X if bit 7 is 1 */
1041 ctrl->pcix_speed_capability = 1;
1042 else
1043 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1044 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1045 ctrl->pcix_speed_capability = 0;
1046 } else {
1047 /* Conventional PCI */
1048 ctrl->pcix_support = 0;
1049 ctrl->pcix_speed_capability = 0;
1050 }
1051 break;
1052
1053 default:
1054 err(msg_HPC_not_supported);
1055 rc = -ENODEV;
1056 goto err_free_ctrl;
1057 }
1058
1059 /* Tell the user that we found one. */
1060 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1061 pdev->bus->number);
1062
1063 dbg("Hotplug controller capabilities:\n");
1064 dbg(" speed_capability %d\n", bus->max_bus_speed);
1065 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1066 "switch present" : "no switch");
1067 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1068 "PHP supported" : "PHP not supported");
1069 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1070 "supported" : "not supported");
1071 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1072 "supported" : "not supported");
1073 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1074 "supported" : "not supported");
1075 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1076 "supported" : "not supported");
1077
1078 ctrl->pci_dev = pdev;
1079 pci_set_drvdata(pdev, ctrl);
1080
1081 /* make our own copy of the pci bus structure,
1082 * as we like tweaking it a lot */
1083 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1084 if (!ctrl->pci_bus) {
1085 err("out of memory\n");
1086 rc = -ENOMEM;
1087 goto err_free_ctrl;
1088 }
1089
1090 ctrl->bus = pdev->bus->number;
1091 ctrl->rev = pdev->revision;
1092 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1093 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1094
1095 mutex_init(&ctrl->crit_sect);
1096 init_waitqueue_head(&ctrl->queue);
1097
1098 /* initialize our threads if they haven't already been started up */
1099 rc = one_time_init();
1100 if (rc)
1101 goto err_free_bus;
1102
1103 dbg("pdev = %p\n", pdev);
1104 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1105 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1106
1107 if (!request_mem_region(pci_resource_start(pdev, 0),
1108 pci_resource_len(pdev, 0), MY_NAME)) {
1109 err("cannot reserve MMIO region\n");
1110 rc = -ENOMEM;
1111 goto err_free_bus;
1112 }
1113
1114 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1115 pci_resource_len(pdev, 0));
1116 if (!ctrl->hpc_reg) {
1117 err("cannot remap MMIO region %llx @ %llx\n",
1118 (unsigned long long)pci_resource_len(pdev, 0),
1119 (unsigned long long)pci_resource_start(pdev, 0));
1120 rc = -ENODEV;
1121 goto err_free_mem_region;
1122 }
1123
1124 /* Check for 66Mhz operation */
1125 bus->cur_bus_speed = get_controller_speed(ctrl);
1126
1127
1128 /********************************************************
1129 *
1130 * Save configuration headers for this and
1131 * subordinate PCI buses
1132 *
1133 ********************************************************/
1134
1135 /* find the physical slot number of the first hot plug slot */
1136
1137 /* Get slot won't work for devices behind bridges, but
1138 * in this case it will always be called for the "base"
1139 * bus/dev/func of a slot.
1140 * CS: this is leveraging the PCIIRQ routing code from the kernel
1141 * (pci-pc.c: get_irq_routing_table) */
1142 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1143 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1144 &(ctrl->first_slot));
1145 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1146 ctrl->first_slot, rc);
1147 if (rc) {
1148 err(msg_initialization_err, rc);
1149 goto err_iounmap;
1150 }
1151
1152 /* Store PCI Config Space for all devices on this bus */
1153 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1154 if (rc) {
1155 err("%s: unable to save PCI configuration data, error %d\n",
1156 __func__, rc);
1157 goto err_iounmap;
1158 }
1159
1160 /*
1161 * Get IO, memory, and IRQ resources for new devices
1162 */
1163 /* The next line is required for cpqhp_find_available_resources */
1164 ctrl->interrupt = pdev->irq;
1165 if (ctrl->interrupt < 0x10) {
1166 cpqhp_legacy_mode = 1;
1167 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1168 }
1169
1170 ctrl->cfgspc_irq = 0;
1171 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1172
1173 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1174 ctrl->add_support = !rc;
1175 if (rc) {
1176 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1177 err("unable to locate PCI configuration resources for hot plug add.\n");
1178 goto err_iounmap;
1179 }
1180
1181 /*
1182 * Finish setting up the hot plug ctrl device
1183 */
1184 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1185 dbg("NumSlots %d\n", ctrl->slot_device_offset);
1186
1187 ctrl->next_event = 0;
1188
1189 /* Setup the slot information structures */
1190 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1191 if (rc) {
1192 err(msg_initialization_err, 6);
1193 err("%s: unable to save PCI configuration data, error %d\n",
1194 __func__, rc);
1195 goto err_iounmap;
1196 }
1197
1198 /* Mask all general input interrupts */
1199 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1200
1201 /* set up the interrupt */
1202 dbg("HPC interrupt = %d\n", ctrl->interrupt);
1203 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1204 IRQF_SHARED, MY_NAME, ctrl)) {
1205 err("Can't get irq %d for the hotplug pci controller\n",
1206 ctrl->interrupt);
1207 rc = -ENODEV;
1208 goto err_iounmap;
1209 }
1210
1211 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1212 * fault
1213 */
1214 temp_word = readw(ctrl->hpc_reg + MISC);
1215 temp_word |= 0x4006;
1216 writew(temp_word, ctrl->hpc_reg + MISC);
1217
1218 /* Changed 05/05/97 to clear all interrupts at start */
1219 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1220
1221 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1222
1223 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1224
1225 if (!cpqhp_ctrl_list) {
1226 cpqhp_ctrl_list = ctrl;
1227 ctrl->next = NULL;
1228 } else {
1229 ctrl->next = cpqhp_ctrl_list;
1230 cpqhp_ctrl_list = ctrl;
1231 }
1232
1233 /* turn off empty slots here unless command line option "ON" set
1234 * Wait for exclusive access to hardware
1235 */
1236 mutex_lock(&ctrl->crit_sect);
1237
1238 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1239
1240 /* find first device number for the ctrl */
1241 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1242
1243 while (num_of_slots) {
1244 dbg("num_of_slots: %d\n", num_of_slots);
1245 func = cpqhp_slot_find(ctrl->bus, device, 0);
1246 if (!func)
1247 break;
1248
1249 hp_slot = func->device - ctrl->slot_device_offset;
1250 dbg("hp_slot: %d\n", hp_slot);
1251
1252 /* We have to save the presence info for these slots */
1253 temp_word = ctrl->ctrl_int_comp >> 16;
1254 func->presence_save = (temp_word >> hp_slot) & 0x01;
1255 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1256
1257 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1258 func->switch_save = 0;
1259 else
1260 func->switch_save = 0x10;
1261
1262 if (!power_mode)
1263 if (!func->is_a_board) {
1264 green_LED_off(ctrl, hp_slot);
1265 slot_disable(ctrl, hp_slot);
1266 }
1267
1268 device++;
1269 num_of_slots--;
1270 }
1271
1272 if (!power_mode) {
1273 set_SOGO(ctrl);
1274 /* Wait for SOBS to be unset */
1275 wait_for_ctrl_irq(ctrl);
1276 }
1277
1278 rc = init_SERR(ctrl);
1279 if (rc) {
1280 err("init_SERR failed\n");
1281 mutex_unlock(&ctrl->crit_sect);
1282 goto err_free_irq;
1283 }
1284
1285 /* Done with exclusive hardware access */
1286 mutex_unlock(&ctrl->crit_sect);
1287
1288 cpqhp_create_debugfs_files(ctrl);
1289
1290 return 0;
1291
1292 err_free_irq:
1293 free_irq(ctrl->interrupt, ctrl);
1294 err_iounmap:
1295 iounmap(ctrl->hpc_reg);
1296 err_free_mem_region:
1297 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1298 err_free_bus:
1299 kfree(ctrl->pci_bus);
1300 err_free_ctrl:
1301 kfree(ctrl);
1302 err_disable_device:
1303 pci_disable_device(pdev);
1304 return rc;
1305 }
1306
1307 static void __exit unload_cpqphpd(void)
1308 {
1309 struct pci_func *next;
1310 struct pci_func *TempSlot;
1311 int loop;
1312 u32 rc;
1313 struct controller *ctrl;
1314 struct controller *tctrl;
1315 struct pci_resource *res;
1316 struct pci_resource *tres;
1317
1318 rc = compaq_nvram_store(cpqhp_rom_start);
1319
1320 ctrl = cpqhp_ctrl_list;
1321
1322 while (ctrl) {
1323 if (ctrl->hpc_reg) {
1324 u16 misc;
1325 rc = read_slot_enable(ctrl);
1326
1327 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1328 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1329
1330 misc = readw(ctrl->hpc_reg + MISC);
1331 misc &= 0xFFFD;
1332 writew(misc, ctrl->hpc_reg + MISC);
1333 }
1334
1335 ctrl_slot_cleanup(ctrl);
1336
1337 res = ctrl->io_head;
1338 while (res) {
1339 tres = res;
1340 res = res->next;
1341 kfree(tres);
1342 }
1343
1344 res = ctrl->mem_head;
1345 while (res) {
1346 tres = res;
1347 res = res->next;
1348 kfree(tres);
1349 }
1350
1351 res = ctrl->p_mem_head;
1352 while (res) {
1353 tres = res;
1354 res = res->next;
1355 kfree(tres);
1356 }
1357
1358 res = ctrl->bus_head;
1359 while (res) {
1360 tres = res;
1361 res = res->next;
1362 kfree(tres);
1363 }
1364
1365 kfree(ctrl->pci_bus);
1366
1367 tctrl = ctrl;
1368 ctrl = ctrl->next;
1369 kfree(tctrl);
1370 }
1371
1372 for (loop = 0; loop < 256; loop++) {
1373 next = cpqhp_slot_list[loop];
1374 while (next != NULL) {
1375 res = next->io_head;
1376 while (res) {
1377 tres = res;
1378 res = res->next;
1379 kfree(tres);
1380 }
1381
1382 res = next->mem_head;
1383 while (res) {
1384 tres = res;
1385 res = res->next;
1386 kfree(tres);
1387 }
1388
1389 res = next->p_mem_head;
1390 while (res) {
1391 tres = res;
1392 res = res->next;
1393 kfree(tres);
1394 }
1395
1396 res = next->bus_head;
1397 while (res) {
1398 tres = res;
1399 res = res->next;
1400 kfree(tres);
1401 }
1402
1403 TempSlot = next;
1404 next = next->next;
1405 kfree(TempSlot);
1406 }
1407 }
1408
1409 /* Stop the notification mechanism */
1410 if (initialized)
1411 cpqhp_event_stop_thread();
1412
1413 /* unmap the rom address */
1414 if (cpqhp_rom_start)
1415 iounmap(cpqhp_rom_start);
1416 if (smbios_start)
1417 iounmap(smbios_start);
1418 }
1419
1420 static struct pci_device_id hpcd_pci_tbl[] = {
1421 {
1422 /* handle any PCI Hotplug controller */
1423 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1424 .class_mask = ~0,
1425
1426 /* no matter who makes it */
1427 .vendor = PCI_ANY_ID,
1428 .device = PCI_ANY_ID,
1429 .subvendor = PCI_ANY_ID,
1430 .subdevice = PCI_ANY_ID,
1431
1432 }, { /* end: all zeroes */ }
1433 };
1434
1435 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1436
1437 static struct pci_driver cpqhpc_driver = {
1438 .name = "compaq_pci_hotplug",
1439 .id_table = hpcd_pci_tbl,
1440 .probe = cpqhpc_probe,
1441 /* remove: cpqhpc_remove_one, */
1442 };
1443
1444 static int __init cpqhpc_init(void)
1445 {
1446 int result;
1447
1448 cpqhp_debug = debug;
1449
1450 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
1451 cpqhp_initialize_debugfs();
1452 result = pci_register_driver(&cpqhpc_driver);
1453 dbg("pci_register_driver = %d\n", result);
1454 return result;
1455 }
1456
1457 static void __exit cpqhpc_cleanup(void)
1458 {
1459 dbg("unload_cpqphpd()\n");
1460 unload_cpqphpd();
1461
1462 dbg("pci_unregister_driver\n");
1463 pci_unregister_driver(&cpqhpc_driver);
1464 cpqhp_shutdown_debugfs();
1465 }
1466
1467 module_init(cpqhpc_init);
1468 module_exit(cpqhpc_cleanup);
Linux with added FPC-III support