x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / spi / spi-lm70llp.c
blob61ee0f4269ae668e95a6352bd44d05349f05d43a
1 /*
2 * Driver for LM70EVAL-LLP board for the LM70 sensor
4 * Copyright (C) 2006 Kaiwan N Billimoria <kaiwan@designergraphix.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/delay.h>
23 #include <linux/device.h>
24 #include <linux/parport.h>
25 #include <linux/sysfs.h>
26 #include <linux/workqueue.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/spi_bitbang.h>
32 * The LM70 communicates with a host processor using a 3-wire variant of
33 * the SPI/Microwire bus interface. This driver specifically supports an
34 * NS LM70 LLP Evaluation Board, interfacing to a PC using its parallel
35 * port to bitbang an SPI-parport bridge. Accordingly, this is an SPI
36 * master controller driver. The hwmon/lm70 driver is a "SPI protocol
37 * driver", layered on top of this one and usable without the lm70llp.
39 * Datasheet and Schematic:
40 * The LM70 is a temperature sensor chip from National Semiconductor; its
41 * datasheet is available at http://www.national.com/pf/LM/LM70.html
42 * The schematic for this particular board (the LM70EVAL-LLP) is
43 * available (on page 4) here:
44 * http://www.national.com/appinfo/tempsensors/files/LM70LLPEVALmanual.pdf
46 * Also see Documentation/spi/spi-lm70llp. The SPI<->parport code here is
47 * (heavily) based on spi-butterfly by David Brownell.
49 * The LM70 LLP connects to the PC parallel port in the following manner:
51 * Parallel LM70 LLP
52 * Port Direction JP2 Header
53 * ----------- --------- ------------
54 * D0 2 - -
55 * D1 3 --> V+ 5
56 * D2 4 --> V+ 5
57 * D3 5 --> V+ 5
58 * D4 6 --> V+ 5
59 * D5 7 --> nCS 8
60 * D6 8 --> SCLK 3
61 * D7 9 --> SI/O 5
62 * GND 25 - GND 7
63 * Select 13 <-- SI/O 1
65 * Note that parport pin 13 actually gets inverted by the transistor
66 * arrangement which lets either the parport or the LM70 drive the
67 * SI/SO signal (see the schematic for details).
70 #define DRVNAME "spi-lm70llp"
72 #define lm70_INIT 0xBE
73 #define SIO 0x10
74 #define nCS 0x20
75 #define SCLK 0x40
77 /*-------------------------------------------------------------------------*/
79 struct spi_lm70llp {
80 struct spi_bitbang bitbang;
81 struct parport *port;
82 struct pardevice *pd;
83 struct spi_device *spidev_lm70;
84 struct spi_board_info info;
85 //struct device *dev;
88 /* REVISIT : ugly global ; provides "exclusive open" facility */
89 static struct spi_lm70llp *lm70llp;
91 /*-------------------------------------------------------------------*/
93 static inline struct spi_lm70llp *spidev_to_pp(struct spi_device *spi)
95 return spi->controller_data;
98 /*---------------------- LM70 LLP eval board-specific inlines follow */
100 /* NOTE: we don't actually need to reread the output values, since they'll
101 * still be what we wrote before. Plus, going through parport builds in
102 * a ~1ms/operation delay; these SPI transfers could easily be faster.
105 static inline void deassertCS(struct spi_lm70llp *pp)
107 u8 data = parport_read_data(pp->port);
109 data &= ~0x80; /* pull D7/SI-out low while de-asserted */
110 parport_write_data(pp->port, data | nCS);
113 static inline void assertCS(struct spi_lm70llp *pp)
115 u8 data = parport_read_data(pp->port);
117 data |= 0x80; /* pull D7/SI-out high so lm70 drives SO-in */
118 parport_write_data(pp->port, data & ~nCS);
121 static inline void clkHigh(struct spi_lm70llp *pp)
123 u8 data = parport_read_data(pp->port);
125 parport_write_data(pp->port, data | SCLK);
128 static inline void clkLow(struct spi_lm70llp *pp)
130 u8 data = parport_read_data(pp->port);
132 parport_write_data(pp->port, data & ~SCLK);
135 /*------------------------- SPI-LM70-specific inlines ----------------------*/
137 static inline void spidelay(unsigned d)
139 udelay(d);
142 static inline void setsck(struct spi_device *s, int is_on)
144 struct spi_lm70llp *pp = spidev_to_pp(s);
146 if (is_on)
147 clkHigh(pp);
148 else
149 clkLow(pp);
152 static inline void setmosi(struct spi_device *s, int is_on)
154 /* FIXME update D7 ... this way we can put the chip
155 * into shutdown mode and read the manufacturer ID,
156 * but we can't put it back into operational mode.
161 * getmiso:
162 * Why do we return 0 when the SIO line is high and vice-versa?
163 * The fact is, the lm70 eval board from NS (which this driver drives),
164 * is wired in just such a way : when the lm70's SIO goes high, a transistor
165 * switches it to low reflecting this on the parport (pin 13), and vice-versa.
167 static inline int getmiso(struct spi_device *s)
169 struct spi_lm70llp *pp = spidev_to_pp(s);
171 return ((SIO == (parport_read_status(pp->port) & SIO)) ? 0 : 1);
174 /*--------------------------------------------------------------------*/
176 #include "spi-bitbang-txrx.h"
178 static void lm70_chipselect(struct spi_device *spi, int value)
180 struct spi_lm70llp *pp = spidev_to_pp(spi);
182 if (value)
183 assertCS(pp);
184 else
185 deassertCS(pp);
189 * Our actual bitbanger routine.
191 static u32 lm70_txrx(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits)
193 return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
196 static void spi_lm70llp_attach(struct parport *p)
198 struct pardevice *pd;
199 struct spi_lm70llp *pp;
200 struct spi_master *master;
201 int status;
202 struct pardev_cb lm70llp_cb;
204 if (lm70llp) {
205 pr_warn("spi_lm70llp instance already loaded. Aborting.\n");
206 return;
209 /* TODO: this just _assumes_ a lm70 is there ... no probe;
210 * the lm70 driver could verify it, reading the manf ID.
213 master = spi_alloc_master(p->physport->dev, sizeof *pp);
214 if (!master) {
215 status = -ENOMEM;
216 goto out_fail;
218 pp = spi_master_get_devdata(master);
221 * SPI and bitbang hookup.
223 pp->bitbang.master = master;
224 pp->bitbang.chipselect = lm70_chipselect;
225 pp->bitbang.txrx_word[SPI_MODE_0] = lm70_txrx;
226 pp->bitbang.flags = SPI_3WIRE;
229 * Parport hookup
231 pp->port = p;
232 memset(&lm70llp_cb, 0, sizeof(lm70llp_cb));
233 lm70llp_cb.private = pp;
234 lm70llp_cb.flags = PARPORT_FLAG_EXCL;
235 pd = parport_register_dev_model(p, DRVNAME, &lm70llp_cb, 0);
237 if (!pd) {
238 status = -ENOMEM;
239 goto out_free_master;
241 pp->pd = pd;
243 status = parport_claim(pd);
244 if (status < 0)
245 goto out_parport_unreg;
248 * Start SPI ...
250 status = spi_bitbang_start(&pp->bitbang);
251 if (status < 0) {
252 dev_warn(&pd->dev, "spi_bitbang_start failed with status %d\n",
253 status);
254 goto out_off_and_release;
258 * The modalias name MUST match the device_driver name
259 * for the bus glue code to match and subsequently bind them.
260 * We are binding to the generic drivers/hwmon/lm70.c device
261 * driver.
263 strcpy(pp->info.modalias, "lm70");
264 pp->info.max_speed_hz = 6 * 1000 * 1000;
265 pp->info.chip_select = 0;
266 pp->info.mode = SPI_3WIRE | SPI_MODE_0;
268 /* power up the chip, and let the LM70 control SI/SO */
269 parport_write_data(pp->port, lm70_INIT);
271 /* Enable access to our primary data structure via
272 * the board info's (void *)controller_data.
274 pp->info.controller_data = pp;
275 pp->spidev_lm70 = spi_new_device(pp->bitbang.master, &pp->info);
276 if (pp->spidev_lm70)
277 dev_dbg(&pp->spidev_lm70->dev, "spidev_lm70 at %s\n",
278 dev_name(&pp->spidev_lm70->dev));
279 else {
280 dev_warn(&pd->dev, "spi_new_device failed\n");
281 status = -ENODEV;
282 goto out_bitbang_stop;
284 pp->spidev_lm70->bits_per_word = 8;
286 lm70llp = pp;
287 return;
289 out_bitbang_stop:
290 spi_bitbang_stop(&pp->bitbang);
291 out_off_and_release:
292 /* power down */
293 parport_write_data(pp->port, 0);
294 mdelay(10);
295 parport_release(pp->pd);
296 out_parport_unreg:
297 parport_unregister_device(pd);
298 out_free_master:
299 spi_master_put(master);
300 out_fail:
301 pr_info("spi_lm70llp probe fail, status %d\n", status);
304 static void spi_lm70llp_detach(struct parport *p)
306 struct spi_lm70llp *pp;
308 if (!lm70llp || lm70llp->port != p)
309 return;
311 pp = lm70llp;
312 spi_bitbang_stop(&pp->bitbang);
314 /* power down */
315 parport_write_data(pp->port, 0);
317 parport_release(pp->pd);
318 parport_unregister_device(pp->pd);
320 spi_master_put(pp->bitbang.master);
322 lm70llp = NULL;
325 static struct parport_driver spi_lm70llp_drv = {
326 .name = DRVNAME,
327 .match_port = spi_lm70llp_attach,
328 .detach = spi_lm70llp_detach,
329 .devmodel = true,
332 static int __init init_spi_lm70llp(void)
334 return parport_register_driver(&spi_lm70llp_drv);
336 module_init(init_spi_lm70llp);
338 static void __exit cleanup_spi_lm70llp(void)
340 parport_unregister_driver(&spi_lm70llp_drv);
342 module_exit(cleanup_spi_lm70llp);
344 MODULE_AUTHOR("Kaiwan N Billimoria <kaiwan@designergraphix.com>");
345 MODULE_DESCRIPTION(
346 "Parport adapter for the National Semiconductor LM70 LLP eval board");
347 MODULE_LICENSE("GPL");