x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / usb / dwc2 / platform.c
blob9564bc76c56f333fbb6535bdf2487f65c6241039
1 /*
2 * platform.c - DesignWare HS OTG Controller platform driver
4 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the above-listed copyright holders may not be used
16 * to endorse or promote products derived from this software without
17 * specific prior written permission.
19 * ALTERNATIVELY, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") as published by the Free Software
21 * Foundation; either version 2 of the License, or (at your option) any
22 * later version.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/slab.h>
40 #include <linux/clk.h>
41 #include <linux/device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/of_device.h>
44 #include <linux/mutex.h>
45 #include <linux/platform_device.h>
46 #include <linux/phy/phy.h>
47 #include <linux/platform_data/s3c-hsotg.h>
48 #include <linux/reset.h>
50 #include <linux/usb/of.h>
52 #include "core.h"
53 #include "hcd.h"
54 #include "debug.h"
56 static const char dwc2_driver_name[] = "dwc2";
59 * Check the dr_mode against the module configuration and hardware
60 * capabilities.
62 * The hardware, module, and dr_mode, can each be set to host, device,
63 * or otg. Check that all these values are compatible and adjust the
64 * value of dr_mode if possible.
66 * actual
67 * HW MOD dr_mode dr_mode
68 * ------------------------------
69 * HST HST any : HST
70 * HST DEV any : ---
71 * HST OTG any : HST
73 * DEV HST any : ---
74 * DEV DEV any : DEV
75 * DEV OTG any : DEV
77 * OTG HST any : HST
78 * OTG DEV any : DEV
79 * OTG OTG any : dr_mode
81 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
83 enum usb_dr_mode mode;
85 hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
86 if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
87 hsotg->dr_mode = USB_DR_MODE_OTG;
89 mode = hsotg->dr_mode;
91 if (dwc2_hw_is_device(hsotg)) {
92 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
93 dev_err(hsotg->dev,
94 "Controller does not support host mode.\n");
95 return -EINVAL;
97 mode = USB_DR_MODE_PERIPHERAL;
98 } else if (dwc2_hw_is_host(hsotg)) {
99 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
100 dev_err(hsotg->dev,
101 "Controller does not support device mode.\n");
102 return -EINVAL;
104 mode = USB_DR_MODE_HOST;
105 } else {
106 if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
107 mode = USB_DR_MODE_HOST;
108 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
109 mode = USB_DR_MODE_PERIPHERAL;
112 if (mode != hsotg->dr_mode) {
113 dev_warn(hsotg->dev,
114 "Configuration mismatch. dr_mode forced to %s\n",
115 mode == USB_DR_MODE_HOST ? "host" : "device");
117 hsotg->dr_mode = mode;
120 return 0;
123 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
125 struct platform_device *pdev = to_platform_device(hsotg->dev);
126 int ret;
128 ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
129 hsotg->supplies);
130 if (ret)
131 return ret;
133 if (hsotg->clk) {
134 ret = clk_prepare_enable(hsotg->clk);
135 if (ret)
136 return ret;
139 if (hsotg->uphy) {
140 ret = usb_phy_init(hsotg->uphy);
141 } else if (hsotg->plat && hsotg->plat->phy_init) {
142 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
143 } else {
144 ret = phy_power_on(hsotg->phy);
145 if (ret == 0)
146 ret = phy_init(hsotg->phy);
149 return ret;
153 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
154 * @hsotg: The driver state
156 * A wrapper for platform code responsible for controlling
157 * low-level USB platform resources (phy, clock, regulators)
159 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
161 int ret = __dwc2_lowlevel_hw_enable(hsotg);
163 if (ret == 0)
164 hsotg->ll_hw_enabled = true;
165 return ret;
168 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
170 struct platform_device *pdev = to_platform_device(hsotg->dev);
171 int ret = 0;
173 if (hsotg->uphy) {
174 usb_phy_shutdown(hsotg->uphy);
175 } else if (hsotg->plat && hsotg->plat->phy_exit) {
176 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
177 } else {
178 ret = phy_exit(hsotg->phy);
179 if (ret == 0)
180 ret = phy_power_off(hsotg->phy);
182 if (ret)
183 return ret;
185 if (hsotg->clk)
186 clk_disable_unprepare(hsotg->clk);
188 ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
189 hsotg->supplies);
191 return ret;
195 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
196 * @hsotg: The driver state
198 * A wrapper for platform code responsible for controlling
199 * low-level USB platform resources (phy, clock, regulators)
201 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
203 int ret = __dwc2_lowlevel_hw_disable(hsotg);
205 if (ret == 0)
206 hsotg->ll_hw_enabled = false;
207 return ret;
210 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
212 int i, ret;
214 hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
215 if (IS_ERR(hsotg->reset)) {
216 ret = PTR_ERR(hsotg->reset);
217 switch (ret) {
218 case -ENOENT:
219 case -ENOTSUPP:
220 hsotg->reset = NULL;
221 break;
222 default:
223 dev_err(hsotg->dev, "error getting reset control %d\n",
224 ret);
225 return ret;
229 if (hsotg->reset)
230 reset_control_deassert(hsotg->reset);
232 /* Set default UTMI width */
233 hsotg->phyif = GUSBCFG_PHYIF16;
236 * Attempt to find a generic PHY, then look for an old style
237 * USB PHY and then fall back to pdata
239 hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
240 if (IS_ERR(hsotg->phy)) {
241 ret = PTR_ERR(hsotg->phy);
242 switch (ret) {
243 case -ENODEV:
244 case -ENOSYS:
245 hsotg->phy = NULL;
246 break;
247 case -EPROBE_DEFER:
248 return ret;
249 default:
250 dev_err(hsotg->dev, "error getting phy %d\n", ret);
251 return ret;
255 if (!hsotg->phy) {
256 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
257 if (IS_ERR(hsotg->uphy)) {
258 ret = PTR_ERR(hsotg->uphy);
259 switch (ret) {
260 case -ENODEV:
261 case -ENXIO:
262 hsotg->uphy = NULL;
263 break;
264 case -EPROBE_DEFER:
265 return ret;
266 default:
267 dev_err(hsotg->dev, "error getting usb phy %d\n",
268 ret);
269 return ret;
274 hsotg->plat = dev_get_platdata(hsotg->dev);
276 if (hsotg->phy) {
278 * If using the generic PHY framework, check if the PHY bus
279 * width is 8-bit and set the phyif appropriately.
281 if (phy_get_bus_width(hsotg->phy) == 8)
282 hsotg->phyif = GUSBCFG_PHYIF8;
285 /* Clock */
286 hsotg->clk = devm_clk_get(hsotg->dev, "otg");
287 if (IS_ERR(hsotg->clk)) {
288 hsotg->clk = NULL;
289 dev_dbg(hsotg->dev, "cannot get otg clock\n");
292 /* Regulators */
293 for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
294 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
296 ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
297 hsotg->supplies);
298 if (ret) {
299 dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
300 return ret;
302 return 0;
306 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
307 * DWC_otg driver
309 * @dev: Platform device
311 * This routine is called, for example, when the rmmod command is executed. The
312 * device may or may not be electrically present. If it is present, the driver
313 * stops device processing. Any resources used on behalf of this device are
314 * freed.
316 static int dwc2_driver_remove(struct platform_device *dev)
318 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
320 dwc2_debugfs_exit(hsotg);
321 if (hsotg->hcd_enabled)
322 dwc2_hcd_remove(hsotg);
323 if (hsotg->gadget_enabled)
324 dwc2_hsotg_remove(hsotg);
326 if (hsotg->ll_hw_enabled)
327 dwc2_lowlevel_hw_disable(hsotg);
329 if (hsotg->reset)
330 reset_control_assert(hsotg->reset);
332 return 0;
336 * dwc2_driver_shutdown() - Called on device shutdown
338 * @dev: Platform device
340 * In specific conditions (involving usb hubs) dwc2 devices can create a
341 * lot of interrupts, even to the point of overwhelming devices running
342 * at low frequencies. Some devices need to do special clock handling
343 * at shutdown-time which may bring the system clock below the threshold
344 * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
345 * prevents reboots/poweroffs from getting stuck in such cases.
347 static void dwc2_driver_shutdown(struct platform_device *dev)
349 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
351 disable_irq(hsotg->irq);
355 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
356 * driver
358 * @dev: Platform device
360 * This routine creates the driver components required to control the device
361 * (core, HCD, and PCD) and initializes the device. The driver components are
362 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
363 * in the device private data. This allows the driver to access the dwc2_hsotg
364 * structure on subsequent calls to driver methods for this device.
366 static int dwc2_driver_probe(struct platform_device *dev)
368 struct dwc2_hsotg *hsotg;
369 struct resource *res;
370 int retval;
372 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
373 if (!hsotg)
374 return -ENOMEM;
376 hsotg->dev = &dev->dev;
379 * Use reasonable defaults so platforms don't have to provide these.
381 if (!dev->dev.dma_mask)
382 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
383 retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
384 if (retval)
385 return retval;
387 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
388 hsotg->regs = devm_ioremap_resource(&dev->dev, res);
389 if (IS_ERR(hsotg->regs))
390 return PTR_ERR(hsotg->regs);
392 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
393 (unsigned long)res->start, hsotg->regs);
395 retval = dwc2_lowlevel_hw_init(hsotg);
396 if (retval)
397 return retval;
399 spin_lock_init(&hsotg->lock);
401 hsotg->irq = platform_get_irq(dev, 0);
402 if (hsotg->irq < 0) {
403 dev_err(&dev->dev, "missing IRQ resource\n");
404 return hsotg->irq;
407 dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
408 hsotg->irq);
409 retval = devm_request_irq(hsotg->dev, hsotg->irq,
410 dwc2_handle_common_intr, IRQF_SHARED,
411 dev_name(hsotg->dev), hsotg);
412 if (retval)
413 return retval;
415 retval = dwc2_lowlevel_hw_enable(hsotg);
416 if (retval)
417 return retval;
419 retval = dwc2_get_dr_mode(hsotg);
420 if (retval)
421 goto error;
424 * Reset before dwc2_get_hwparams() then it could get power-on real
425 * reset value form registers.
427 dwc2_core_reset_and_force_dr_mode(hsotg);
429 /* Detect config values from hardware */
430 retval = dwc2_get_hwparams(hsotg);
431 if (retval)
432 goto error;
434 dwc2_force_dr_mode(hsotg);
436 retval = dwc2_init_params(hsotg);
437 if (retval)
438 goto error;
440 if (hsotg->dr_mode != USB_DR_MODE_HOST) {
441 retval = dwc2_gadget_init(hsotg, hsotg->irq);
442 if (retval)
443 goto error;
444 hsotg->gadget_enabled = 1;
447 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
448 retval = dwc2_hcd_init(hsotg);
449 if (retval) {
450 if (hsotg->gadget_enabled)
451 dwc2_hsotg_remove(hsotg);
452 goto error;
454 hsotg->hcd_enabled = 1;
457 platform_set_drvdata(dev, hsotg);
459 dwc2_debugfs_init(hsotg);
461 /* Gadget code manages lowlevel hw on its own */
462 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
463 dwc2_lowlevel_hw_disable(hsotg);
465 return 0;
467 error:
468 dwc2_lowlevel_hw_disable(hsotg);
469 return retval;
472 static int __maybe_unused dwc2_suspend(struct device *dev)
474 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
475 int ret = 0;
477 if (dwc2_is_device_mode(dwc2))
478 dwc2_hsotg_suspend(dwc2);
480 if (dwc2->ll_hw_enabled)
481 ret = __dwc2_lowlevel_hw_disable(dwc2);
483 return ret;
486 static int __maybe_unused dwc2_resume(struct device *dev)
488 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
489 int ret = 0;
491 if (dwc2->ll_hw_enabled) {
492 ret = __dwc2_lowlevel_hw_enable(dwc2);
493 if (ret)
494 return ret;
497 if (dwc2_is_device_mode(dwc2))
498 ret = dwc2_hsotg_resume(dwc2);
500 return ret;
503 static const struct dev_pm_ops dwc2_dev_pm_ops = {
504 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
507 static struct platform_driver dwc2_platform_driver = {
508 .driver = {
509 .name = dwc2_driver_name,
510 .of_match_table = dwc2_of_match_table,
511 .pm = &dwc2_dev_pm_ops,
513 .probe = dwc2_driver_probe,
514 .remove = dwc2_driver_remove,
515 .shutdown = dwc2_driver_shutdown,
518 module_platform_driver(dwc2_platform_driver);
520 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
521 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
522 MODULE_LICENSE("Dual BSD/GPL");