x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / clock / r7s72100-clock.h
blobce09915c298fd8179a3289ebac8b2fe101015649
1 /*
2 * Copyright (C) 2014 Renesas Solutions Corp.
3 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 */
10 #ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
11 #define __DT_BINDINGS_CLOCK_R7S72100_H__
13 #define R7S72100_CLK_PLL 0
15 /* MSTP3 */
16 #define R7S72100_CLK_MTU2 3
18 /* MSTP4 */
19 #define R7S72100_CLK_SCIF0 7
20 #define R7S72100_CLK_SCIF1 6
21 #define R7S72100_CLK_SCIF2 5
22 #define R7S72100_CLK_SCIF3 4
23 #define R7S72100_CLK_SCIF4 3
24 #define R7S72100_CLK_SCIF5 2
25 #define R7S72100_CLK_SCIF6 1
26 #define R7S72100_CLK_SCIF7 0
28 /* MSTP5 */
29 #define R7S72100_CLK_OSTM0 1
30 #define R7S72100_CLK_OSTM1 0
32 /* MSTP7 */
33 #define R7S72100_CLK_ETHER 4
35 /* MSTP8 */
36 #define R7S72100_CLK_MMCIF 4
38 /* MSTP9 */
39 #define R7S72100_CLK_I2C0 7
40 #define R7S72100_CLK_I2C1 6
41 #define R7S72100_CLK_I2C2 5
42 #define R7S72100_CLK_I2C3 4
44 /* MSTP10 */
45 #define R7S72100_CLK_SPI0 7
46 #define R7S72100_CLK_SPI1 6
47 #define R7S72100_CLK_SPI2 5
48 #define R7S72100_CLK_SPI3 4
49 #define R7S72100_CLK_SPI4 3
51 /* MSTP12 */
52 #define R7S72100_CLK_SDHI0 3
53 #define R7S72100_CLK_SDHI1 2
55 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */