x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / clock / r8a7740-clock.h
blob476135da0f238811889460a6ca524230fc51a368
1 /*
2 * Copyright 2014 Ulrich Hecht
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
10 #ifndef __DT_BINDINGS_CLOCK_R8A7740_H__
11 #define __DT_BINDINGS_CLOCK_R8A7740_H__
13 /* CPG */
14 #define R8A7740_CLK_SYSTEM 0
15 #define R8A7740_CLK_PLLC0 1
16 #define R8A7740_CLK_PLLC1 2
17 #define R8A7740_CLK_PLLC2 3
18 #define R8A7740_CLK_R 4
19 #define R8A7740_CLK_USB24S 5
20 #define R8A7740_CLK_I 6
21 #define R8A7740_CLK_ZG 7
22 #define R8A7740_CLK_B 8
23 #define R8A7740_CLK_M1 9
24 #define R8A7740_CLK_HP 10
25 #define R8A7740_CLK_HPP 11
26 #define R8A7740_CLK_USBP 12
27 #define R8A7740_CLK_S 13
28 #define R8A7740_CLK_ZB 14
29 #define R8A7740_CLK_M3 15
30 #define R8A7740_CLK_CP 16
32 /* MSTP1 */
33 #define R8A7740_CLK_CEU21 28
34 #define R8A7740_CLK_CEU20 27
35 #define R8A7740_CLK_TMU0 25
36 #define R8A7740_CLK_LCDC1 17
37 #define R8A7740_CLK_IIC0 16
38 #define R8A7740_CLK_TMU1 11
39 #define R8A7740_CLK_LCDC0 0
41 /* MSTP2 */
42 #define R8A7740_CLK_SCIFA6 30
43 #define R8A7740_CLK_INTCA 29
44 #define R8A7740_CLK_SCIFA7 22
45 #define R8A7740_CLK_DMAC1 18
46 #define R8A7740_CLK_DMAC2 17
47 #define R8A7740_CLK_DMAC3 16
48 #define R8A7740_CLK_USBDMAC 14
49 #define R8A7740_CLK_SCIFA5 7
50 #define R8A7740_CLK_SCIFB 6
51 #define R8A7740_CLK_SCIFA0 4
52 #define R8A7740_CLK_SCIFA1 3
53 #define R8A7740_CLK_SCIFA2 2
54 #define R8A7740_CLK_SCIFA3 1
55 #define R8A7740_CLK_SCIFA4 0
57 /* MSTP3 */
58 #define R8A7740_CLK_CMT1 29
59 #define R8A7740_CLK_FSI 28
60 #define R8A7740_CLK_IIC1 23
61 #define R8A7740_CLK_USBF 20
62 #define R8A7740_CLK_SDHI0 14
63 #define R8A7740_CLK_SDHI1 13
64 #define R8A7740_CLK_MMC 12
65 #define R8A7740_CLK_GETHER 9
66 #define R8A7740_CLK_TPU0 4
68 /* MSTP4 */
69 #define R8A7740_CLK_USBH 16
70 #define R8A7740_CLK_SDHI2 15
71 #define R8A7740_CLK_USBFUNC 7
72 #define R8A7740_CLK_USBPHY 6
74 /* SUBCK* */
75 #define R8A7740_CLK_SUBCK 9
76 #define R8A7740_CLK_SUBCK2 10
78 #endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */