x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / clock / sun50i-a64-ccu.h
blob370c0a0473fcb80948decaeba03d092f1c24ca74
1 /*
2 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * Or, alternatively,
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
44 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
46 #define CLK_BUS_MIPI_DSI 28
47 #define CLK_BUS_CE 29
48 #define CLK_BUS_DMA 30
49 #define CLK_BUS_MMC0 31
50 #define CLK_BUS_MMC1 32
51 #define CLK_BUS_MMC2 33
52 #define CLK_BUS_NAND 34
53 #define CLK_BUS_DRAM 35
54 #define CLK_BUS_EMAC 36
55 #define CLK_BUS_TS 37
56 #define CLK_BUS_HSTIMER 38
57 #define CLK_BUS_SPI0 39
58 #define CLK_BUS_SPI1 40
59 #define CLK_BUS_OTG 41
60 #define CLK_BUS_EHCI0 42
61 #define CLK_BUS_EHCI1 43
62 #define CLK_BUS_OHCI0 44
63 #define CLK_BUS_OHCI1 45
64 #define CLK_BUS_VE 46
65 #define CLK_BUS_TCON0 47
66 #define CLK_BUS_TCON1 48
67 #define CLK_BUS_DEINTERLACE 49
68 #define CLK_BUS_CSI 50
69 #define CLK_BUS_HDMI 51
70 #define CLK_BUS_DE 52
71 #define CLK_BUS_GPU 53
72 #define CLK_BUS_MSGBOX 54
73 #define CLK_BUS_SPINLOCK 55
74 #define CLK_BUS_CODEC 56
75 #define CLK_BUS_SPDIF 57
76 #define CLK_BUS_PIO 58
77 #define CLK_BUS_THS 59
78 #define CLK_BUS_I2S0 60
79 #define CLK_BUS_I2S1 61
80 #define CLK_BUS_I2S2 62
81 #define CLK_BUS_I2C0 63
82 #define CLK_BUS_I2C1 64
83 #define CLK_BUS_I2C2 65
84 #define CLK_BUS_SCR 66
85 #define CLK_BUS_UART0 67
86 #define CLK_BUS_UART1 68
87 #define CLK_BUS_UART2 69
88 #define CLK_BUS_UART3 70
89 #define CLK_BUS_UART4 71
90 #define CLK_BUS_DBG 72
91 #define CLK_THS 73
92 #define CLK_NAND 74
93 #define CLK_MMC0 75
94 #define CLK_MMC1 76
95 #define CLK_MMC2 77
96 #define CLK_TS 78
97 #define CLK_CE 79
98 #define CLK_SPI0 80
99 #define CLK_SPI1 81
100 #define CLK_I2S0 82
101 #define CLK_I2S1 83
102 #define CLK_I2S2 84
103 #define CLK_SPDIF 85
104 #define CLK_USB_PHY0 86
105 #define CLK_USB_PHY1 87
106 #define CLK_USB_HSIC 88
107 #define CLK_USB_HSIC_12M 89
109 #define CLK_USB_OHCI0 91
111 #define CLK_USB_OHCI1 93
113 #define CLK_DRAM_VE 95
114 #define CLK_DRAM_CSI 96
115 #define CLK_DRAM_DEINTERLACE 97
116 #define CLK_DRAM_TS 98
117 #define CLK_DE 99
118 #define CLK_TCON0 100
119 #define CLK_TCON1 101
120 #define CLK_DEINTERLACE 102
121 #define CLK_CSI_MISC 103
122 #define CLK_CSI_SCLK 104
123 #define CLK_CSI_MCLK 105
124 #define CLK_VE 106
125 #define CLK_AC_DIG 107
126 #define CLK_AC_DIG_4X 108
127 #define CLK_AVS 109
128 #define CLK_HDMI 110
129 #define CLK_HDMI_DDC 111
131 #define CLK_DSI_DPHY 113
132 #define CLK_GPU 114
134 #endif /* _DT_BINDINGS_CLK_SUN50I_H_ */