x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / clock / sun5i-ccu.h
blobaeb2e2f781fb13c9274f6a3807c2afad5aac33d4
1 /*
2 * Copyright 2016 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #ifndef _DT_BINDINGS_CLK_SUN5I_H_
18 #define _DT_BINDINGS_CLK_SUN5I_H_
20 #define CLK_HOSC 1
22 #define CLK_CPU 17
24 #define CLK_AHB_OTG 23
25 #define CLK_AHB_EHCI 24
26 #define CLK_AHB_OHCI 25
27 #define CLK_AHB_SS 26
28 #define CLK_AHB_DMA 27
29 #define CLK_AHB_BIST 28
30 #define CLK_AHB_MMC0 29
31 #define CLK_AHB_MMC1 30
32 #define CLK_AHB_MMC2 31
33 #define CLK_AHB_NAND 32
34 #define CLK_AHB_SDRAM 33
35 #define CLK_AHB_EMAC 34
36 #define CLK_AHB_TS 35
37 #define CLK_AHB_SPI0 36
38 #define CLK_AHB_SPI1 37
39 #define CLK_AHB_SPI2 38
40 #define CLK_AHB_GPS 39
41 #define CLK_AHB_HSTIMER 40
42 #define CLK_AHB_VE 41
43 #define CLK_AHB_TVE 42
44 #define CLK_AHB_LCD 43
45 #define CLK_AHB_CSI 44
46 #define CLK_AHB_HDMI 45
47 #define CLK_AHB_DE_BE 46
48 #define CLK_AHB_DE_FE 47
49 #define CLK_AHB_IEP 48
50 #define CLK_AHB_GPU 49
51 #define CLK_APB0_CODEC 50
52 #define CLK_APB0_SPDIF 51
53 #define CLK_APB0_I2S 52
54 #define CLK_APB0_PIO 53
55 #define CLK_APB0_IR 54
56 #define CLK_APB0_KEYPAD 55
57 #define CLK_APB1_I2C0 56
58 #define CLK_APB1_I2C1 57
59 #define CLK_APB1_I2C2 58
60 #define CLK_APB1_UART0 59
61 #define CLK_APB1_UART1 60
62 #define CLK_APB1_UART2 61
63 #define CLK_APB1_UART3 62
64 #define CLK_NAND 63
65 #define CLK_MMC0 64
66 #define CLK_MMC1 65
67 #define CLK_MMC2 66
68 #define CLK_TS 67
69 #define CLK_SS 68
70 #define CLK_SPI0 69
71 #define CLK_SPI1 70
72 #define CLK_SPI2 71
73 #define CLK_IR 72
74 #define CLK_I2S 73
75 #define CLK_SPDIF 74
76 #define CLK_KEYPAD 75
77 #define CLK_USB_OHCI 76
78 #define CLK_USB_PHY0 77
79 #define CLK_USB_PHY1 78
80 #define CLK_GPS 79
81 #define CLK_DRAM_VE 80
82 #define CLK_DRAM_CSI 81
83 #define CLK_DRAM_TS 82
84 #define CLK_DRAM_TVE 83
85 #define CLK_DRAM_DE_FE 84
86 #define CLK_DRAM_DE_BE 85
87 #define CLK_DRAM_ACE 86
88 #define CLK_DRAM_IEP 87
89 #define CLK_DE_BE 88
90 #define CLK_DE_FE 89
91 #define CLK_TCON_CH0 90
93 #define CLK_TCON_CH1 92
94 #define CLK_CSI 93
95 #define CLK_VE 94
96 #define CLK_CODEC 95
97 #define CLK_AVS 96
98 #define CLK_HDMI 97
99 #define CLK_GPU 98
101 #define CLK_IEP 100
103 #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */