x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / iio / qcom,spmi-vadc.h
blob42121fa238fafbf96919b3b93678f949d9e69d22
1 /*
2 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
15 #define _DT_BINDINGS_QCOM_SPMI_VADC_H
17 /* Voltage ADC channels */
18 #define VADC_USBIN 0x00
19 #define VADC_DCIN 0x01
20 #define VADC_VCHG_SNS 0x02
21 #define VADC_SPARE1_03 0x03
22 #define VADC_USB_ID_MV 0x04
23 #define VADC_VCOIN 0x05
24 #define VADC_VBAT_SNS 0x06
25 #define VADC_VSYS 0x07
26 #define VADC_DIE_TEMP 0x08
27 #define VADC_REF_625MV 0x09
28 #define VADC_REF_1250MV 0x0a
29 #define VADC_CHG_TEMP 0x0b
30 #define VADC_SPARE1 0x0c
31 #define VADC_SPARE2 0x0d
32 #define VADC_GND_REF 0x0e
33 #define VADC_VDD_VADC 0x0f
35 #define VADC_P_MUX1_1_1 0x10
36 #define VADC_P_MUX2_1_1 0x11
37 #define VADC_P_MUX3_1_1 0x12
38 #define VADC_P_MUX4_1_1 0x13
39 #define VADC_P_MUX5_1_1 0x14
40 #define VADC_P_MUX6_1_1 0x15
41 #define VADC_P_MUX7_1_1 0x16
42 #define VADC_P_MUX8_1_1 0x17
43 #define VADC_P_MUX9_1_1 0x18
44 #define VADC_P_MUX10_1_1 0x19
45 #define VADC_P_MUX11_1_1 0x1a
46 #define VADC_P_MUX12_1_1 0x1b
47 #define VADC_P_MUX13_1_1 0x1c
48 #define VADC_P_MUX14_1_1 0x1d
49 #define VADC_P_MUX15_1_1 0x1e
50 #define VADC_P_MUX16_1_1 0x1f
52 #define VADC_P_MUX1_1_3 0x20
53 #define VADC_P_MUX2_1_3 0x21
54 #define VADC_P_MUX3_1_3 0x22
55 #define VADC_P_MUX4_1_3 0x23
56 #define VADC_P_MUX5_1_3 0x24
57 #define VADC_P_MUX6_1_3 0x25
58 #define VADC_P_MUX7_1_3 0x26
59 #define VADC_P_MUX8_1_3 0x27
60 #define VADC_P_MUX9_1_3 0x28
61 #define VADC_P_MUX10_1_3 0x29
62 #define VADC_P_MUX11_1_3 0x2a
63 #define VADC_P_MUX12_1_3 0x2b
64 #define VADC_P_MUX13_1_3 0x2c
65 #define VADC_P_MUX14_1_3 0x2d
66 #define VADC_P_MUX15_1_3 0x2e
67 #define VADC_P_MUX16_1_3 0x2f
69 #define VADC_LR_MUX1_BAT_THERM 0x30
70 #define VADC_LR_MUX2_BAT_ID 0x31
71 #define VADC_LR_MUX3_XO_THERM 0x32
72 #define VADC_LR_MUX4_AMUX_THM1 0x33
73 #define VADC_LR_MUX5_AMUX_THM2 0x34
74 #define VADC_LR_MUX6_AMUX_THM3 0x35
75 #define VADC_LR_MUX7_HW_ID 0x36
76 #define VADC_LR_MUX8_AMUX_THM4 0x37
77 #define VADC_LR_MUX9_AMUX_THM5 0x38
78 #define VADC_LR_MUX10_USB_ID 0x39
79 #define VADC_AMUX_PU1 0x3a
80 #define VADC_AMUX_PU2 0x3b
81 #define VADC_LR_MUX3_BUF_XO_THERM 0x3c
83 #define VADC_LR_MUX1_PU1_BAT_THERM 0x70
84 #define VADC_LR_MUX2_PU1_BAT_ID 0x71
85 #define VADC_LR_MUX3_PU1_XO_THERM 0x72
86 #define VADC_LR_MUX4_PU1_AMUX_THM1 0x73
87 #define VADC_LR_MUX5_PU1_AMUX_THM2 0x74
88 #define VADC_LR_MUX6_PU1_AMUX_THM3 0x75
89 #define VADC_LR_MUX7_PU1_AMUX_HW_ID 0x76
90 #define VADC_LR_MUX8_PU1_AMUX_THM4 0x77
91 #define VADC_LR_MUX9_PU1_AMUX_THM5 0x78
92 #define VADC_LR_MUX10_PU1_AMUX_USB_ID 0x79
93 #define VADC_LR_MUX3_BUF_PU1_XO_THERM 0x7c
95 #define VADC_LR_MUX1_PU2_BAT_THERM 0xb0
96 #define VADC_LR_MUX2_PU2_BAT_ID 0xb1
97 #define VADC_LR_MUX3_PU2_XO_THERM 0xb2
98 #define VADC_LR_MUX4_PU2_AMUX_THM1 0xb3
99 #define VADC_LR_MUX5_PU2_AMUX_THM2 0xb4
100 #define VADC_LR_MUX6_PU2_AMUX_THM3 0xb5
101 #define VADC_LR_MUX7_PU2_AMUX_HW_ID 0xb6
102 #define VADC_LR_MUX8_PU2_AMUX_THM4 0xb7
103 #define VADC_LR_MUX9_PU2_AMUX_THM5 0xb8
104 #define VADC_LR_MUX10_PU2_AMUX_USB_ID 0xb9
105 #define VADC_LR_MUX3_BUF_PU2_XO_THERM 0xbc
107 #define VADC_LR_MUX1_PU1_PU2_BAT_THERM 0xf0
108 #define VADC_LR_MUX2_PU1_PU2_BAT_ID 0xf1
109 #define VADC_LR_MUX3_PU1_PU2_XO_THERM 0xf2
110 #define VADC_LR_MUX4_PU1_PU2_AMUX_THM1 0xf3
111 #define VADC_LR_MUX5_PU1_PU2_AMUX_THM2 0xf4
112 #define VADC_LR_MUX6_PU1_PU2_AMUX_THM3 0xf5
113 #define VADC_LR_MUX7_PU1_PU2_AMUX_HW_ID 0xf6
114 #define VADC_LR_MUX8_PU1_PU2_AMUX_THM4 0xf7
115 #define VADC_LR_MUX9_PU1_PU2_AMUX_THM5 0xf8
116 #define VADC_LR_MUX10_PU1_PU2_AMUX_USB_ID 0xf9
117 #define VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM 0xfc
119 #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */