x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / reset / oxsemi,ox820.h
blobcc6797bf01d8352f0dca253798aca4da19fdd8ad
1 /*
2 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef DT_RESET_OXSEMI_OX820_H
18 #define DT_RESET_OXSEMI_OX820_H
20 #define RESET_SCU 0
21 #define RESET_LEON 1
22 #define RESET_ARM0 2
23 #define RESET_ARM1 3
24 #define RESET_USBHS 4
25 #define RESET_USBPHYA 5
26 #define RESET_MAC 6
27 #define RESET_PCIEA 7
28 #define RESET_SGDMA 8
29 #define RESET_CIPHER 9
30 #define RESET_DDR 10
31 #define RESET_SATA 11
32 #define RESET_SATA_LINK 12
33 #define RESET_SATA_PHY 13
34 #define RESET_PCIEPHY 14
35 #define RESET_NAND 15
36 #define RESET_GPIO 16
37 #define RESET_UART1 17
38 #define RESET_UART2 18
39 #define RESET_MISC 19
40 #define RESET_I2S 20
41 #define RESET_SD 21
42 #define RESET_MAC_2 22
43 #define RESET_PCIEB 23
44 #define RESET_VIDEO 24
45 #define RESET_DDR_PHY 25
46 #define RESET_USBPHYB 26
47 #define RESET_USBDEV 27
48 /* Reserved 29 */
49 #define RESET_ARMDBG 29
50 #define RESET_PLLA 30
51 #define RESET_PLLB 31
53 #endif /* DT_RESET_OXSEMI_OX820_H */