x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / include / dt-bindings / reset / pistachio-resets.h
blob60a189b1faef8a54cb97ca188bcd8aab9b2f5998
1 /*
2 * This header provides constants for the reset controller
3 * present in the Pistachio SoC
4 */
6 #ifndef _PISTACHIO_RESETS_H
7 #define _PISTACHIO_RESETS_H
9 #define PISTACHIO_RESET_I2C0 0
10 #define PISTACHIO_RESET_I2C1 1
11 #define PISTACHIO_RESET_I2C2 2
12 #define PISTACHIO_RESET_I2C3 3
13 #define PISTACHIO_RESET_I2S_IN 4
14 #define PISTACHIO_RESET_PRL_OUT 5
15 #define PISTACHIO_RESET_SPDIF_OUT 6
16 #define PISTACHIO_RESET_SPI 7
17 #define PISTACHIO_RESET_PWM_PDM 8
18 #define PISTACHIO_RESET_UART0 9
19 #define PISTACHIO_RESET_UART1 10
20 #define PISTACHIO_RESET_QSPI 11
21 #define PISTACHIO_RESET_MDC 12
22 #define PISTACHIO_RESET_SDHOST 13
23 #define PISTACHIO_RESET_ETHERNET 14
24 #define PISTACHIO_RESET_IR 15
25 #define PISTACHIO_RESET_HASH 16
26 #define PISTACHIO_RESET_TIMER 17
27 #define PISTACHIO_RESET_I2S_OUT 18
28 #define PISTACHIO_RESET_SPDIF_IN 19
29 #define PISTACHIO_RESET_EVT 20
30 #define PISTACHIO_RESET_USB_H 21
31 #define PISTACHIO_RESET_USB_PR 22
32 #define PISTACHIO_RESET_USB_PHY_PR 23
33 #define PISTACHIO_RESET_USB_PHY_PON 24
34 #define PISTACHIO_RESET_MAX 24
36 #endif