include/video/atmel_lcdc.h

   1 /*
   2  *  Header file for AT91/AT32 LCD Controller
   3  *
   4  *  Data structure and register user interface
   5  *
   6  *  Copyright (C) 2007 Atmel Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22 #ifndef __ATMEL_LCDC_H__
  23 #define __ATMEL_LCDC_H__
  24
  25 #include <linux/workqueue.h>
  26
  27 /* Way LCD wires are connected to the chip:
  28  * Some Atmel chips use BGR color mode (instead of standard RGB)
  29  * A swapped wiring onboard can bring to RGB mode.
  30  */
  31 #define ATMEL_LCDC_WIRING_BGR   0
  32 #define ATMEL_LCDC_WIRING_RGB   1
  33
  34
  35  /* LCD Controller info data structure, stored in device platform_data */
  36 struct atmel_lcdfb_pdata {
  37         unsigned int            guard_time;
  38         bool                    lcdcon_is_backlight;
  39         bool                    lcdcon_pol_negative;
  40         u8                      default_bpp;
  41         u8                      lcd_wiring_mode;
  42         unsigned int            default_lcdcon2;
  43         unsigned int            default_dmacon;
  44         void (*atmel_lcdfb_power_control)(struct atmel_lcdfb_pdata *pdata, int on);
  45         struct fb_monspecs      *default_monspecs;
  46
  47         struct list_head        pwr_gpios;
  48 };
  49
  50 #define ATMEL_LCDC_DMABADDR1    0x00
  51 #define ATMEL_LCDC_DMABADDR2    0x04
  52 #define ATMEL_LCDC_DMAFRMPT1    0x08
  53 #define ATMEL_LCDC_DMAFRMPT2    0x0c
  54 #define ATMEL_LCDC_DMAFRMADD1   0x10
  55 #define ATMEL_LCDC_DMAFRMADD2   0x14
  56
  57 #define ATMEL_LCDC_DMAFRMCFG    0x18
  58 #define ATMEL_LCDC_FRSIZE       (0x7fffff <<  0)
  59 #define ATMEL_LCDC_BLENGTH_OFFSET       24
  60 #define ATMEL_LCDC_BLENGTH      (0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)
  61
  62 #define ATMEL_LCDC_DMACON       0x1c
  63 #define ATMEL_LCDC_DMAEN        (0x1 << 0)
  64 #define ATMEL_LCDC_DMARST       (0x1 << 1)
  65 #define ATMEL_LCDC_DMABUSY      (0x1 << 2)
  66 #define         ATMEL_LCDC_DMAUPDT      (0x1 << 3)
  67 #define         ATMEL_LCDC_DMA2DEN      (0x1 << 4)
  68
  69 #define ATMEL_LCDC_DMA2DCFG     0x20
  70 #define         ATMEL_LCDC_ADDRINC_OFFSET       0
  71 #define         ATMEL_LCDC_ADDRINC              (0xffff)
  72 #define         ATMEL_LCDC_PIXELOFF_OFFSET      24
  73 #define         ATMEL_LCDC_PIXELOFF             (0x1f << 24)
  74
  75 #define ATMEL_LCDC_LCDCON1      0x0800
  76 #define ATMEL_LCDC_BYPASS       (1     <<  0)
  77 #define ATMEL_LCDC_CLKVAL_OFFSET        12
  78 #define ATMEL_LCDC_CLKVAL       (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
  79 #define ATMEL_LCDC_LINCNT       (0x7ff << 21)
  80
  81 #define ATMEL_LCDC_LCDCON2      0x0804
  82 #define ATMEL_LCDC_DISTYPE      (3 << 0)
  83 #define         ATMEL_LCDC_DISTYPE_STNMONO      (0 << 0)
  84 #define         ATMEL_LCDC_DISTYPE_STNCOLOR     (1 << 0)
  85 #define         ATMEL_LCDC_DISTYPE_TFT          (2 << 0)
  86 #define ATMEL_LCDC_SCANMOD      (1 << 2)
  87 #define         ATMEL_LCDC_SCANMOD_SINGLE       (0 << 2)
  88 #define         ATMEL_LCDC_SCANMOD_DUAL         (1 << 2)
  89 #define ATMEL_LCDC_IFWIDTH      (3 << 3)
  90 #define         ATMEL_LCDC_IFWIDTH_4            (0 << 3)
  91 #define         ATMEL_LCDC_IFWIDTH_8            (1 << 3)
  92 #define         ATMEL_LCDC_IFWIDTH_16           (2 << 3)
  93 #define ATMEL_LCDC_PIXELSIZE    (7 << 5)
  94 #define         ATMEL_LCDC_PIXELSIZE_1          (0 << 5)
  95 #define         ATMEL_LCDC_PIXELSIZE_2          (1 << 5)
  96 #define         ATMEL_LCDC_PIXELSIZE_4          (2 << 5)
  97 #define         ATMEL_LCDC_PIXELSIZE_8          (3 << 5)
  98 #define         ATMEL_LCDC_PIXELSIZE_16         (4 << 5)
  99 #define         ATMEL_LCDC_PIXELSIZE_24         (5 << 5)
 100 #define         ATMEL_LCDC_PIXELSIZE_32         (6 << 5)
 101 #define ATMEL_LCDC_INVVD        (1 << 8)
 102 #define         ATMEL_LCDC_INVVD_NORMAL         (0 << 8)
 103 #define         ATMEL_LCDC_INVVD_INVERTED       (1 << 8)
 104 #define ATMEL_LCDC_INVFRAME     (1 << 9 )
 105 #define         ATMEL_LCDC_INVFRAME_NORMAL      (0 << 9)
 106 #define         ATMEL_LCDC_INVFRAME_INVERTED    (1 << 9)
 107 #define ATMEL_LCDC_INVLINE      (1 << 10)
 108 #define         ATMEL_LCDC_INVLINE_NORMAL       (0 << 10)
 109 #define         ATMEL_LCDC_INVLINE_INVERTED     (1 << 10)
 110 #define ATMEL_LCDC_INVCLK       (1 << 11)
 111 #define         ATMEL_LCDC_INVCLK_NORMAL        (0 << 11)
 112 #define         ATMEL_LCDC_INVCLK_INVERTED      (1 << 11)
 113 #define ATMEL_LCDC_INVDVAL      (1 << 12)
 114 #define         ATMEL_LCDC_INVDVAL_NORMAL       (0 << 12)
 115 #define         ATMEL_LCDC_INVDVAL_INVERTED     (1 << 12)
 116 #define ATMEL_LCDC_CLKMOD       (1 << 15)
 117 #define         ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
 118 #define         ATMEL_LCDC_CLKMOD_ALWAYSACTIVE  (1 << 15)
 119 #define ATMEL_LCDC_MEMOR        (1 << 31)
 120 #define         ATMEL_LCDC_MEMOR_BIG            (0 << 31)
 121 #define         ATMEL_LCDC_MEMOR_LITTLE         (1 << 31)
 122
 123 #define ATMEL_LCDC_TIM1         0x0808
 124 #define ATMEL_LCDC_VFP          (0xffU <<  0)
 125 #define ATMEL_LCDC_VBP_OFFSET           8
 126 #define ATMEL_LCDC_VBP          (0xffU <<  ATMEL_LCDC_VBP_OFFSET)
 127 #define ATMEL_LCDC_VPW_OFFSET           16
 128 #define ATMEL_LCDC_VPW          (0x3fU << ATMEL_LCDC_VPW_OFFSET)
 129 #define ATMEL_LCDC_VHDLY_OFFSET         24
 130 #define ATMEL_LCDC_VHDLY        (0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
 131
 132 #define ATMEL_LCDC_TIM2         0x080c
 133 #define ATMEL_LCDC_HBP          (0xffU  <<  0)
 134 #define ATMEL_LCDC_HPW_OFFSET           8
 135 #define ATMEL_LCDC_HPW          (0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
 136 #define ATMEL_LCDC_HFP_OFFSET           21
 137 #define ATMEL_LCDC_HFP          (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
 138
 139 #define ATMEL_LCDC_LCDFRMCFG    0x0810
 140 #define ATMEL_LCDC_LINEVAL      (0x7ff <<  0)
 141 #define ATMEL_LCDC_HOZVAL_OFFSET        21
 142 #define ATMEL_LCDC_HOZVAL       (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
 143
 144 #define ATMEL_LCDC_FIFO         0x0814
 145 #define ATMEL_LCDC_FIFOTH       (0xffff)
 146
 147 #define ATMEL_LCDC_MVAL         0x0818
 148
 149 #define ATMEL_LCDC_DP1_2        0x081c
 150 #define ATMEL_LCDC_DP4_7        0x0820
 151 #define ATMEL_LCDC_DP3_5        0x0824
 152 #define ATMEL_LCDC_DP2_3        0x0828
 153 #define ATMEL_LCDC_DP5_7        0x082c
 154 #define ATMEL_LCDC_DP3_4        0x0830
 155 #define ATMEL_LCDC_DP4_5        0x0834
 156 #define ATMEL_LCDC_DP6_7        0x0838
 157 #define ATMEL_LCDC_DP1_2_VAL    (0xff)
 158 #define ATMEL_LCDC_DP4_7_VAL    (0xfffffff)
 159 #define ATMEL_LCDC_DP3_5_VAL    (0xfffff)
 160 #define ATMEL_LCDC_DP2_3_VAL    (0xfff)
 161 #define ATMEL_LCDC_DP5_7_VAL    (0xfffffff)
 162 #define ATMEL_LCDC_DP3_4_VAL    (0xffff)
 163 #define ATMEL_LCDC_DP4_5_VAL    (0xfffff)
 164 #define ATMEL_LCDC_DP6_7_VAL    (0xfffffff)
 165
 166 #define ATMEL_LCDC_PWRCON       0x083c
 167 #define ATMEL_LCDC_PWR          (1    <<  0)
 168 #define ATMEL_LCDC_GUARDT_OFFSET        1
 169 #define ATMEL_LCDC_GUARDT       (0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
 170 #define ATMEL_LCDC_BUSY         (1    << 31)
 171
 172 #define ATMEL_LCDC_CONTRAST_CTR 0x0840
 173 #define ATMEL_LCDC_PS           (3 << 0)
 174 #define         ATMEL_LCDC_PS_DIV1              (0 << 0)
 175 #define         ATMEL_LCDC_PS_DIV2              (1 << 0)
 176 #define         ATMEL_LCDC_PS_DIV4              (2 << 0)
 177 #define         ATMEL_LCDC_PS_DIV8              (3 << 0)
 178 #define ATMEL_LCDC_POL          (1 << 2)
 179 #define         ATMEL_LCDC_POL_NEGATIVE         (0 << 2)
 180 #define         ATMEL_LCDC_POL_POSITIVE         (1 << 2)
 181 #define ATMEL_LCDC_ENA          (1 << 3)
 182 #define         ATMEL_LCDC_ENA_PWMDISABLE       (0 << 3)
 183 #define         ATMEL_LCDC_ENA_PWMENABLE        (1 << 3)
 184
 185 #define ATMEL_LCDC_CONTRAST_VAL 0x0844
 186 #define ATMEL_LCDC_CVAL (0xff)
 187
 188 #define ATMEL_LCDC_IER          0x0848
 189 #define ATMEL_LCDC_IDR          0x084c
 190 #define ATMEL_LCDC_IMR          0x0850
 191 #define ATMEL_LCDC_ISR          0x0854
 192 #define ATMEL_LCDC_ICR          0x0858
 193 #define ATMEL_LCDC_LNI          (1 << 0)
 194 #define ATMEL_LCDC_LSTLNI       (1 << 1)
 195 #define ATMEL_LCDC_EOFI         (1 << 2)
 196 #define ATMEL_LCDC_UFLWI        (1 << 4)
 197 #define ATMEL_LCDC_OWRI         (1 << 5)
 198 #define ATMEL_LCDC_MERI         (1 << 6)
 199
 200 #define ATMEL_LCDC_LUT(n)       (0x0c00 + ((n)*4))
 201
 202 #endif /* __ATMEL_LCDC_H__ */