x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / sound / drivers / vx / vx_uer.c
blobef0b40c0a594274b097c3bdaa7dd6e3a11698b89
1 /*
2 * Driver for Digigram VX soundcards
4 * IEC958 stuff
6 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/delay.h>
24 #include <sound/core.h>
25 #include <sound/vx_core.h>
26 #include "vx_cmd.h"
30 * vx_modify_board_clock - tell the board that its clock has been modified
31 * @sync: DSP needs to resynchronize its FIFO
33 static int vx_modify_board_clock(struct vx_core *chip, int sync)
35 struct vx_rmh rmh;
37 vx_init_rmh(&rmh, CMD_MODIFY_CLOCK);
38 /* Ask the DSP to resynchronize its FIFO. */
39 if (sync)
40 rmh.Cmd[0] |= CMD_MODIFY_CLOCK_S_BIT;
41 return vx_send_msg(chip, &rmh);
45 * vx_modify_board_inputs - resync audio inputs
47 static int vx_modify_board_inputs(struct vx_core *chip)
49 struct vx_rmh rmh;
51 vx_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS);
52 rmh.Cmd[0] |= 1 << 0; /* reference: AUDIO 0 */
53 return vx_send_msg(chip, &rmh);
57 * vx_read_one_cbit - read one bit from UER config
58 * @index: the bit index
59 * returns 0 or 1.
61 static int vx_read_one_cbit(struct vx_core *chip, int index)
63 int val;
65 mutex_lock(&chip->lock);
66 if (chip->type >= VX_TYPE_VXPOCKET) {
67 vx_outb(chip, CSUER, 1); /* read */
68 vx_outb(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
69 val = (vx_inb(chip, RUER) >> 7) & 0x01;
70 } else {
71 vx_outl(chip, CSUER, 1); /* read */
72 vx_outl(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
73 val = (vx_inl(chip, RUER) >> 7) & 0x01;
75 mutex_unlock(&chip->lock);
76 return val;
80 * vx_write_one_cbit - write one bit to UER config
81 * @index: the bit index
82 * @val: bit value, 0 or 1
84 static void vx_write_one_cbit(struct vx_core *chip, int index, int val)
86 val = !!val; /* 0 or 1 */
87 mutex_lock(&chip->lock);
88 if (vx_is_pcmcia(chip)) {
89 vx_outb(chip, CSUER, 0); /* write */
90 vx_outb(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
91 } else {
92 vx_outl(chip, CSUER, 0); /* write */
93 vx_outl(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
95 mutex_unlock(&chip->lock);
99 * vx_read_uer_status - read the current UER status
100 * @mode: pointer to store the UER mode, VX_UER_MODE_XXX
102 * returns the frequency of UER, or 0 if not sync,
103 * or a negative error code.
105 static int vx_read_uer_status(struct vx_core *chip, unsigned int *mode)
107 int val, freq;
109 /* Default values */
110 freq = 0;
112 /* Read UER status */
113 if (vx_is_pcmcia(chip))
114 val = vx_inb(chip, CSUER);
115 else
116 val = vx_inl(chip, CSUER);
117 if (val < 0)
118 return val;
119 /* If clock is present, read frequency */
120 if (val & VX_SUER_CLOCK_PRESENT_MASK) {
121 switch (val & VX_SUER_FREQ_MASK) {
122 case VX_SUER_FREQ_32KHz_MASK:
123 freq = 32000;
124 break;
125 case VX_SUER_FREQ_44KHz_MASK:
126 freq = 44100;
127 break;
128 case VX_SUER_FREQ_48KHz_MASK:
129 freq = 48000;
130 break;
133 if (val & VX_SUER_DATA_PRESENT_MASK)
134 /* bit 0 corresponds to consumer/professional bit */
135 *mode = vx_read_one_cbit(chip, 0) ?
136 VX_UER_MODE_PROFESSIONAL : VX_UER_MODE_CONSUMER;
137 else
138 *mode = VX_UER_MODE_NOT_PRESENT;
140 return freq;
145 * compute the sample clock value from frequency
147 * The formula is as follows:
149 * HexFreq = (dword) ((double) ((double) 28224000 / (double) Frequency))
150 * switch ( HexFreq & 0x00000F00 )
151 * case 0x00000100: ;
152 * case 0x00000200:
153 * case 0x00000300: HexFreq -= 0x00000201 ;
154 * case 0x00000400:
155 * case 0x00000500:
156 * case 0x00000600:
157 * case 0x00000700: HexFreq = (dword) (((double) 28224000 / (double) (Frequency*2)) - 1)
158 * default : HexFreq = (dword) ((double) 28224000 / (double) (Frequency*4)) - 0x000001FF
161 static int vx_calc_clock_from_freq(struct vx_core *chip, int freq)
163 int hexfreq;
165 if (snd_BUG_ON(freq <= 0))
166 return 0;
168 hexfreq = (28224000 * 10) / freq;
169 hexfreq = (hexfreq + 5) / 10;
171 /* max freq = 55125 Hz */
172 if (snd_BUG_ON(hexfreq <= 0x00000200))
173 return 0;
175 if (hexfreq <= 0x03ff)
176 return hexfreq - 0x00000201;
177 if (hexfreq <= 0x07ff)
178 return (hexfreq / 2) - 1;
179 if (hexfreq <= 0x0fff)
180 return (hexfreq / 4) + 0x000001ff;
182 return 0x5fe; /* min freq = 6893 Hz */
187 * vx_change_clock_source - change the clock source
188 * @source: the new source
190 static void vx_change_clock_source(struct vx_core *chip, int source)
192 /* we mute DAC to prevent clicks */
193 vx_toggle_dac_mute(chip, 1);
194 mutex_lock(&chip->lock);
195 chip->ops->set_clock_source(chip, source);
196 chip->clock_source = source;
197 mutex_unlock(&chip->lock);
198 /* unmute */
199 vx_toggle_dac_mute(chip, 0);
204 * set the internal clock
206 void vx_set_internal_clock(struct vx_core *chip, unsigned int freq)
208 int clock;
210 /* Get real clock value */
211 clock = vx_calc_clock_from_freq(chip, freq);
212 snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, freq);
213 mutex_lock(&chip->lock);
214 if (vx_is_pcmcia(chip)) {
215 vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f);
216 vx_outb(chip, LOFREQ, clock & 0xff);
217 } else {
218 vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f);
219 vx_outl(chip, LOFREQ, clock & 0xff);
221 mutex_unlock(&chip->lock);
226 * set the iec958 status bits
227 * @bits: 32-bit status bits
229 void vx_set_iec958_status(struct vx_core *chip, unsigned int bits)
231 int i;
233 if (chip->chip_status & VX_STAT_IS_STALE)
234 return;
236 for (i = 0; i < 32; i++)
237 vx_write_one_cbit(chip, i, bits & (1 << i));
242 * vx_set_clock - change the clock and audio source if necessary
244 int vx_set_clock(struct vx_core *chip, unsigned int freq)
246 int src_changed = 0;
248 if (chip->chip_status & VX_STAT_IS_STALE)
249 return 0;
251 /* change the audio source if possible */
252 vx_sync_audio_source(chip);
254 if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL ||
255 (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
256 chip->audio_source == VX_AUDIO_SRC_DIGITAL)) {
257 if (chip->clock_source != UER_SYNC) {
258 vx_change_clock_source(chip, UER_SYNC);
259 mdelay(6);
260 src_changed = 1;
262 } else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL ||
263 (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
264 chip->audio_source != VX_AUDIO_SRC_DIGITAL)) {
265 if (chip->clock_source != INTERNAL_QUARTZ) {
266 vx_change_clock_source(chip, INTERNAL_QUARTZ);
267 src_changed = 1;
269 if (chip->freq == freq)
270 return 0;
271 vx_set_internal_clock(chip, freq);
272 if (src_changed)
273 vx_modify_board_inputs(chip);
275 if (chip->freq == freq)
276 return 0;
277 chip->freq = freq;
278 vx_modify_board_clock(chip, 1);
279 return 0;
284 * vx_change_frequency - called from interrupt handler
286 int vx_change_frequency(struct vx_core *chip)
288 int freq;
290 if (chip->chip_status & VX_STAT_IS_STALE)
291 return 0;
293 if (chip->clock_source == INTERNAL_QUARTZ)
294 return 0;
296 * Read the real UER board frequency
298 freq = vx_read_uer_status(chip, &chip->uer_detected);
299 if (freq < 0)
300 return freq;
302 * The frequency computed by the DSP is good and
303 * is different from the previous computed.
305 if (freq == 48000 || freq == 44100 || freq == 32000)
306 chip->freq_detected = freq;
308 return 0;