x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / sound / pci / asihpi / hpi6205.h
blobec0827b633a62bd972c4ec302721cf872150c2e0
1 /*****************************************************************************
3 AudioScience HPI driver
4 Copyright (C) 1997-2011 AudioScience Inc. <support@audioscience.com>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of version 2 of the GNU General Public License as
8 published by the Free Software Foundation;
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 Host Interface module for an ASI6205 based
20 bus mastering PCI adapter.
22 Copyright AudioScience, Inc., 2003
23 ******************************************************************************/
25 #ifndef _HPI6205_H_
26 #define _HPI6205_H_
28 #include "hpi_internal.h"
30 /***********************************************************
31 Defines used for basic messaging
32 ************************************************************/
33 #define H620_HIF_RESET 0
34 #define H620_HIF_IDLE 1
35 #define H620_HIF_GET_RESP 2
36 #define H620_HIF_DATA_DONE 3
37 #define H620_HIF_DATA_MASK 0x10
38 #define H620_HIF_SEND_DATA 0x14
39 #define H620_HIF_GET_DATA 0x15
40 #define H620_HIF_UNKNOWN 0x0000ffff
42 /***********************************************************
43 Types used for mixer control caching
44 ************************************************************/
46 #define H620_MAX_ISTREAMS 32
47 #define H620_MAX_OSTREAMS 32
48 #define HPI_NMIXER_CONTROLS 2048
50 /*********************************************************************
51 This is used for dynamic control cache allocation
52 **********************************************************************/
53 struct controlcache_6205 {
54 u32 number_of_controls;
55 u32 physical_address32;
56 u32 size_in_bytes;
59 /*********************************************************************
60 This is used for dynamic allocation of async event array
61 **********************************************************************/
62 struct async_event_buffer_6205 {
63 u32 physical_address32;
64 u32 spare;
65 struct hpi_fifo_buffer b;
68 /***********************************************************
69 The Host located memory buffer that the 6205 will bus master
70 in and out of.
71 ************************************************************/
72 #define HPI6205_SIZEOF_DATA (16*1024)
74 struct message_buffer_6205 {
75 struct hpi_message message;
76 char data[256];
79 struct response_buffer_6205 {
80 struct hpi_response response;
81 char data[256];
84 union buffer_6205 {
85 struct message_buffer_6205 message_buffer;
86 struct response_buffer_6205 response_buffer;
87 u8 b_data[HPI6205_SIZEOF_DATA];
90 struct bus_master_interface {
91 u32 host_cmd;
92 u32 dsp_ack;
93 u32 transfer_size_in_bytes;
94 union buffer_6205 u;
95 struct controlcache_6205 control_cache;
96 struct async_event_buffer_6205 async_buffer;
97 struct hpi_hostbuffer_status
98 instream_host_buffer_status[H620_MAX_ISTREAMS];
99 struct hpi_hostbuffer_status
100 outstream_host_buffer_status[H620_MAX_OSTREAMS];
103 #endif