drivers/mtd/devices/serial_flash_cmds.h

   1 /*
   2  * Generic/SFDP Flash Commands and Device Capabilities
   3  *
   4  * Copyright (C) 2013 Lee Jones <lee.jones@lianro.org>
   5  *
   6  * This code is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 #ifndef _MTD_SERIAL_FLASH_CMDS_H
  13 #define _MTD_SERIAL_FLASH_CMDS_H
  14
  15 /* Generic Flash Commands/OPCODEs */
  16 #define FLASH_CMD_WREN          0x06
  17 #define FLASH_CMD_WRDI          0x04
  18 #define FLASH_CMD_RDID          0x9f
  19 #define FLASH_CMD_RDSR          0x05
  20 #define FLASH_CMD_RDSR2         0x35
  21 #define FLASH_CMD_WRSR          0x01
  22 #define FLASH_CMD_SE_4K         0x20
  23 #define FLASH_CMD_SE_32K        0x52
  24 #define FLASH_CMD_SE            0xd8
  25 #define FLASH_CMD_CHIPERASE     0xc7
  26 #define FLASH_CMD_WRVCR         0x81
  27 #define FLASH_CMD_RDVCR         0x85
  28
  29 /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */
  30 #define FLASH_CMD_READ          0x03    /* READ */
  31 #define FLASH_CMD_READ_FAST     0x0b    /* FAST READ */
  32 #define FLASH_CMD_READ_1_1_2    0x3b    /* DUAL OUTPUT READ */
  33 #define FLASH_CMD_READ_1_2_2    0xbb    /* DUAL I/O READ */
  34 #define FLASH_CMD_READ_1_1_4    0x6b    /* QUAD OUTPUT READ */
  35 #define FLASH_CMD_READ_1_4_4    0xeb    /* QUAD I/O READ */
  36
  37 #define FLASH_CMD_WRITE         0x02    /* PAGE PROGRAM */
  38 #define FLASH_CMD_WRITE_1_1_2   0xa2    /* DUAL INPUT PROGRAM */
  39 #define FLASH_CMD_WRITE_1_2_2   0xd2    /* DUAL INPUT EXT PROGRAM */
  40 #define FLASH_CMD_WRITE_1_1_4   0x32    /* QUAD INPUT PROGRAM */
  41 #define FLASH_CMD_WRITE_1_4_4   0x12    /* QUAD INPUT EXT PROGRAM */
  42
  43 #define FLASH_CMD_EN4B_ADDR     0xb7    /* Enter 4-byte address mode */
  44 #define FLASH_CMD_EX4B_ADDR     0xe9    /* Exit 4-byte address mode */
  45
  46 /* READ commands with 32-bit addressing */
  47 #define FLASH_CMD_READ4         0x13
  48 #define FLASH_CMD_READ4_FAST    0x0c
  49 #define FLASH_CMD_READ4_1_1_2   0x3c
  50 #define FLASH_CMD_READ4_1_2_2   0xbc
  51 #define FLASH_CMD_READ4_1_1_4   0x6c
  52 #define FLASH_CMD_READ4_1_4_4   0xec
  53
  54 /* Configuration flags */
  55 #define FLASH_FLAG_SINGLE       0x000000ff
  56 #define FLASH_FLAG_READ_WRITE   0x00000001
  57 #define FLASH_FLAG_READ_FAST    0x00000002
  58 #define FLASH_FLAG_SE_4K        0x00000004
  59 #define FLASH_FLAG_SE_32K       0x00000008
  60 #define FLASH_FLAG_CE           0x00000010
  61 #define FLASH_FLAG_32BIT_ADDR   0x00000020
  62 #define FLASH_FLAG_RESET        0x00000040
  63 #define FLASH_FLAG_DYB_LOCKING  0x00000080
  64
  65 #define FLASH_FLAG_DUAL         0x0000ff00
  66 #define FLASH_FLAG_READ_1_1_2   0x00000100
  67 #define FLASH_FLAG_READ_1_2_2   0x00000200
  68 #define FLASH_FLAG_READ_2_2_2   0x00000400
  69 #define FLASH_FLAG_WRITE_1_1_2  0x00001000
  70 #define FLASH_FLAG_WRITE_1_2_2  0x00002000
  71 #define FLASH_FLAG_WRITE_2_2_2  0x00004000
  72
  73 #define FLASH_FLAG_QUAD         0x00ff0000
  74 #define FLASH_FLAG_READ_1_1_4   0x00010000
  75 #define FLASH_FLAG_READ_1_4_4   0x00020000
  76 #define FLASH_FLAG_READ_4_4_4   0x00040000
  77 #define FLASH_FLAG_WRITE_1_1_4  0x00100000
  78 #define FLASH_FLAG_WRITE_1_4_4  0x00200000
  79 #define FLASH_FLAG_WRITE_4_4_4  0x00400000
  80
  81 #endif /* _MTD_SERIAL_FLASH_CMDS_H */