2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
7 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
10 #include <linux/export.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/clk.h>
15 #include <linux/clkdev.h>
16 #include <linux/err.h>
17 #include <linux/list.h>
21 #include <asm/div64.h>
23 #include <lantiq_soc.h>
28 /* lantiq socs have 3 static clocks */
29 static struct clk cpu_clk_generic
[4];
31 void clkdev_add_static(unsigned long cpu
, unsigned long fpi
,
32 unsigned long io
, unsigned long ppe
)
34 cpu_clk_generic
[0].rate
= cpu
;
35 cpu_clk_generic
[1].rate
= fpi
;
36 cpu_clk_generic
[2].rate
= io
;
37 cpu_clk_generic
[3].rate
= ppe
;
40 struct clk
*clk_get_cpu(void)
42 return &cpu_clk_generic
[0];
45 struct clk
*clk_get_fpi(void)
47 return &cpu_clk_generic
[1];
49 EXPORT_SYMBOL_GPL(clk_get_fpi
);
51 struct clk
*clk_get_io(void)
53 return &cpu_clk_generic
[2];
56 struct clk
*clk_get_ppe(void)
58 return &cpu_clk_generic
[3];
60 EXPORT_SYMBOL_GPL(clk_get_ppe
);
62 static inline int clk_good(struct clk
*clk
)
64 return clk
&& !IS_ERR(clk
);
67 unsigned long clk_get_rate(struct clk
*clk
)
69 if (unlikely(!clk_good(clk
)))
75 if (clk
->get_rate
!= NULL
)
76 return clk
->get_rate();
80 EXPORT_SYMBOL(clk_get_rate
);
82 int clk_set_rate(struct clk
*clk
, unsigned long rate
)
84 if (unlikely(!clk_good(clk
)))
86 if (clk
->rates
&& *clk
->rates
) {
87 unsigned long *r
= clk
->rates
;
89 while (*r
&& (*r
!= rate
))
92 pr_err("clk %s.%s: trying to set invalid rate %ld\n",
93 clk
->cl
.dev_id
, clk
->cl
.con_id
, rate
);
100 EXPORT_SYMBOL(clk_set_rate
);
102 long clk_round_rate(struct clk
*clk
, unsigned long rate
)
104 if (unlikely(!clk_good(clk
)))
106 if (clk
->rates
&& *clk
->rates
) {
107 unsigned long *r
= clk
->rates
;
109 while (*r
&& (*r
!= rate
))
117 EXPORT_SYMBOL(clk_round_rate
);
119 int clk_enable(struct clk
*clk
)
121 if (unlikely(!clk_good(clk
)))
125 return clk
->enable(clk
);
129 EXPORT_SYMBOL(clk_enable
);
131 void clk_disable(struct clk
*clk
)
133 if (unlikely(!clk_good(clk
)))
139 EXPORT_SYMBOL(clk_disable
);
141 int clk_activate(struct clk
*clk
)
143 if (unlikely(!clk_good(clk
)))
147 return clk
->activate(clk
);
151 EXPORT_SYMBOL(clk_activate
);
153 void clk_deactivate(struct clk
*clk
)
155 if (unlikely(!clk_good(clk
)))
159 clk
->deactivate(clk
);
161 EXPORT_SYMBOL(clk_deactivate
);
163 struct clk
*of_clk_get_from_provider(struct of_phandle_args
*clkspec
)
168 static inline u32
get_counter_resolution(void)
172 __asm__
__volatile__(
184 void __init
plat_time_init(void)
191 mips_hpt_frequency
= clk_get_rate(clk
) / get_counter_resolution();
192 write_c0_compare(read_c0_count());
193 pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk
) / 1000000);