Staging: strip: delete the driver
[linux/fpc-iii.git] / drivers / edac / edac_mce_amd.h
blobdf23ee065f7981fe9f4084b461efa1de0f5d6836
1 #ifndef _EDAC_MCE_AMD_H
2 #define _EDAC_MCE_AMD_H
4 #include <asm/mce.h>
6 #define ERROR_CODE(x) ((x) & 0xffff)
7 #define EXT_ERROR_CODE(x) (((x) >> 16) & 0x1f)
8 #define EXT_ERR_MSG(x) ext_msgs[EXT_ERROR_CODE(x)]
10 #define LOW_SYNDROME(x) (((x) >> 15) & 0xff)
11 #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff)
13 #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010)
14 #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100)
15 #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800)
17 #define TT(x) (((x) >> 2) & 0x3)
18 #define TT_MSG(x) tt_msgs[TT(x)]
19 #define II(x) (((x) >> 2) & 0x3)
20 #define II_MSG(x) ii_msgs[II(x)]
21 #define LL(x) (((x) >> 0) & 0x3)
22 #define LL_MSG(x) ll_msgs[LL(x)]
23 #define RRRR(x) (((x) >> 4) & 0xf)
24 #define RRRR_MSG(x) rrrr_msgs[RRRR(x)]
25 #define TO(x) (((x) >> 8) & 0x1)
26 #define TO_MSG(x) to_msgs[TO(x)]
27 #define PP(x) (((x) >> 9) & 0x3)
28 #define PP_MSG(x) pp_msgs[PP(x)]
30 #define K8_NBSH 0x4C
32 #define K8_NBSH_VALID_BIT BIT(31)
33 #define K8_NBSH_OVERFLOW BIT(30)
34 #define K8_NBSH_UC_ERR BIT(29)
35 #define K8_NBSH_ERR_EN BIT(28)
36 #define K8_NBSH_MISCV BIT(27)
37 #define K8_NBSH_VALID_ERROR_ADDR BIT(26)
38 #define K8_NBSH_PCC BIT(25)
39 #define K8_NBSH_ERR_CPU_VAL BIT(24)
40 #define K8_NBSH_CECC BIT(14)
41 #define K8_NBSH_UECC BIT(13)
42 #define K8_NBSH_ERR_SCRUBER BIT(8)
44 extern const char *tt_msgs[];
45 extern const char *ll_msgs[];
46 extern const char *rrrr_msgs[];
47 extern const char *pp_msgs[];
48 extern const char *to_msgs[];
49 extern const char *ii_msgs[];
50 extern const char *ext_msgs[];
53 * relevant NB regs
55 struct err_regs {
56 u32 nbcfg;
57 u32 nbsh;
58 u32 nbsl;
59 u32 nbeah;
60 u32 nbeal;
64 void amd_report_gart_errors(bool);
65 void amd_register_ecc_decoder(void (*f)(int, struct err_regs *));
66 void amd_unregister_ecc_decoder(void (*f)(int, struct err_regs *));
67 void amd_decode_nb_mce(int, struct err_regs *, int);
69 #endif /* _EDAC_MCE_AMD_H */