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Staging: strip: delete the driver
[linux/fpc-iii.git] / drivers / gpu / drm / i810 / i810_dma.c
blob997d91707ad217f545c9720c0b0b9a604617f7e2
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/pagemap.h>
41
42 #define I810_BUF_FREE 2
43 #define I810_BUF_CLIENT 1
44 #define I810_BUF_HARDWARE 0
45
46 #define I810_BUF_UNMAPPED 0
47 #define I810_BUF_MAPPED 1
48
49 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
50 {
51 struct drm_device_dma *dma = dev->dma;
52 int i;
53 int used;
54
55 /* Linear search might not be the best solution */
56
57 for (i = 0; i < dma->buf_count; i++) {
58 struct drm_buf *buf = dma->buflist[i];
59 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
60 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
62 I810_BUF_CLIENT);
63 if (used == I810_BUF_FREE) {
64 return buf;
65 }
66 }
67 return NULL;
68 }
69
70 /* This should only be called if the buffer is not sent to the hardware
71 * yet, the hardware updates in use for us once its on the ring buffer.
72 */
73
74 static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf)
75 {
76 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
77 int used;
78
79 /* In use is already a pointer */
80 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
81 if (used != I810_BUF_CLIENT) {
82 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
83 return -EINVAL;
84 }
85
86 return 0;
87 }
88
89 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
90 {
91 struct drm_file *priv = filp->private_data;
92 struct drm_device *dev;
93 drm_i810_private_t *dev_priv;
94 struct drm_buf *buf;
95 drm_i810_buf_priv_t *buf_priv;
96
97 lock_kernel();
98 dev = priv->minor->dev;
99 dev_priv = dev->dev_private;
100 buf = dev_priv->mmap_buffer;
101 buf_priv = buf->dev_private;
102
103 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
104 vma->vm_file = filp;
105
106 buf_priv->currently_mapped = I810_BUF_MAPPED;
107 unlock_kernel();
108
109 if (io_remap_pfn_range(vma, vma->vm_start,
110 vma->vm_pgoff,
111 vma->vm_end - vma->vm_start, vma->vm_page_prot))
112 return -EAGAIN;
113 return 0;
114 }
115
116 static const struct file_operations i810_buffer_fops = {
117 .open = drm_open,
118 .release = drm_release,
119 .unlocked_ioctl = drm_ioctl,
120 .mmap = i810_mmap_buffers,
121 .fasync = drm_fasync,
122 };
123
124 static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
125 {
126 struct drm_device *dev = file_priv->minor->dev;
127 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
128 drm_i810_private_t *dev_priv = dev->dev_private;
129 const struct file_operations *old_fops;
130 int retcode = 0;
131
132 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
133 return -EINVAL;
134
135 down_write(&current->mm->mmap_sem);
136 old_fops = file_priv->filp->f_op;
137 file_priv->filp->f_op = &i810_buffer_fops;
138 dev_priv->mmap_buffer = buf;
139 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
140 PROT_READ | PROT_WRITE,
141 MAP_SHARED, buf->bus_address);
142 dev_priv->mmap_buffer = NULL;
143 file_priv->filp->f_op = old_fops;
144 if (IS_ERR(buf_priv->virtual)) {
145 /* Real error */
146 DRM_ERROR("mmap error\n");
147 retcode = PTR_ERR(buf_priv->virtual);
148 buf_priv->virtual = NULL;
149 }
150 up_write(&current->mm->mmap_sem);
151
152 return retcode;
153 }
154
155 static int i810_unmap_buffer(struct drm_buf * buf)
156 {
157 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
158 int retcode = 0;
159
160 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
161 return -EINVAL;
162
163 down_write(&current->mm->mmap_sem);
164 retcode = do_munmap(current->mm,
165 (unsigned long)buf_priv->virtual,
166 (size_t) buf->total);
167 up_write(&current->mm->mmap_sem);
168
169 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
170 buf_priv->virtual = NULL;
171
172 return retcode;
173 }
174
175 static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
176 struct drm_file *file_priv)
177 {
178 struct drm_buf *buf;
179 drm_i810_buf_priv_t *buf_priv;
180 int retcode = 0;
181
182 buf = i810_freelist_get(dev);
183 if (!buf) {
184 retcode = -ENOMEM;
185 DRM_DEBUG("retcode=%d\n", retcode);
186 return retcode;
187 }
188
189 retcode = i810_map_buffer(buf, file_priv);
190 if (retcode) {
191 i810_freelist_put(dev, buf);
192 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
193 return retcode;
194 }
195 buf->file_priv = file_priv;
196 buf_priv = buf->dev_private;
197 d->granted = 1;
198 d->request_idx = buf->idx;
199 d->request_size = buf->total;
200 d->virtual = buf_priv->virtual;
201
202 return retcode;
203 }
204
205 static int i810_dma_cleanup(struct drm_device * dev)
206 {
207 struct drm_device_dma *dma = dev->dma;
208
209 /* Make sure interrupts are disabled here because the uninstall ioctl
210 * may not have been called from userspace and after dev_private
211 * is freed, it's too late.
212 */
213 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
214 drm_irq_uninstall(dev);
215
216 if (dev->dev_private) {
217 int i;
218 drm_i810_private_t *dev_priv =
219 (drm_i810_private_t *) dev->dev_private;
220
221 if (dev_priv->ring.virtual_start) {
222 drm_core_ioremapfree(&dev_priv->ring.map, dev);
223 }
224 if (dev_priv->hw_status_page) {
225 pci_free_consistent(dev->pdev, PAGE_SIZE,
226 dev_priv->hw_status_page,
227 dev_priv->dma_status_page);
228 /* Need to rewrite hardware status page */
229 I810_WRITE(0x02080, 0x1ffff000);
230 }
231 kfree(dev->dev_private);
232 dev->dev_private = NULL;
233
234 for (i = 0; i < dma->buf_count; i++) {
235 struct drm_buf *buf = dma->buflist[i];
236 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
237
238 if (buf_priv->kernel_virtual && buf->total)
239 drm_core_ioremapfree(&buf_priv->map, dev);
240 }
241 }
242 return 0;
243 }
244
245 static int i810_wait_ring(struct drm_device * dev, int n)
246 {
247 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
249 int iters = 0;
250 unsigned long end;
251 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
252
253 end = jiffies + (HZ * 3);
254 while (ring->space < n) {
255 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
256 ring->space = ring->head - (ring->tail + 8);
257 if (ring->space < 0)
258 ring->space += ring->Size;
259
260 if (ring->head != last_head) {
261 end = jiffies + (HZ * 3);
262 last_head = ring->head;
263 }
264
265 iters++;
266 if (time_before(end, jiffies)) {
267 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
268 DRM_ERROR("lockup\n");
269 goto out_wait_ring;
270 }
271 udelay(1);
272 }
273
274 out_wait_ring:
275 return iters;
276 }
277
278 static void i810_kernel_lost_context(struct drm_device * dev)
279 {
280 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
282
283 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
284 ring->tail = I810_READ(LP_RING + RING_TAIL);
285 ring->space = ring->head - (ring->tail + 8);
286 if (ring->space < 0)
287 ring->space += ring->Size;
288 }
289
290 static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv)
291 {
292 struct drm_device_dma *dma = dev->dma;
293 int my_idx = 24;
294 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
295 int i;
296
297 if (dma->buf_count > 1019) {
298 /* Not enough space in the status page for the freelist */
299 return -EINVAL;
300 }
301
302 for (i = 0; i < dma->buf_count; i++) {
303 struct drm_buf *buf = dma->buflist[i];
304 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
305
306 buf_priv->in_use = hw_status++;
307 buf_priv->my_use_idx = my_idx;
308 my_idx += 4;
309
310 *buf_priv->in_use = I810_BUF_FREE;
311
312 buf_priv->map.offset = buf->bus_address;
313 buf_priv->map.size = buf->total;
314 buf_priv->map.type = _DRM_AGP;
315 buf_priv->map.flags = 0;
316 buf_priv->map.mtrr = 0;
317
318 drm_core_ioremap(&buf_priv->map, dev);
319 buf_priv->kernel_virtual = buf_priv->map.handle;
320
321 }
322 return 0;
323 }
324
325 static int i810_dma_initialize(struct drm_device * dev,
326 drm_i810_private_t * dev_priv,
327 drm_i810_init_t * init)
328 {
329 struct drm_map_list *r_list;
330 memset(dev_priv, 0, sizeof(drm_i810_private_t));
331
332 list_for_each_entry(r_list, &dev->maplist, head) {
333 if (r_list->map &&
334 r_list->map->type == _DRM_SHM &&
335 r_list->map->flags & _DRM_CONTAINS_LOCK) {
336 dev_priv->sarea_map = r_list->map;
337 break;
338 }
339 }
340 if (!dev_priv->sarea_map) {
341 dev->dev_private = (void *)dev_priv;
342 i810_dma_cleanup(dev);
343 DRM_ERROR("can not find sarea!\n");
344 return -EINVAL;
345 }
346 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
347 if (!dev_priv->mmio_map) {
348 dev->dev_private = (void *)dev_priv;
349 i810_dma_cleanup(dev);
350 DRM_ERROR("can not find mmio map!\n");
351 return -EINVAL;
352 }
353 dev->agp_buffer_token = init->buffers_offset;
354 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
355 if (!dev->agp_buffer_map) {
356 dev->dev_private = (void *)dev_priv;
357 i810_dma_cleanup(dev);
358 DRM_ERROR("can not find dma buffer map!\n");
359 return -EINVAL;
360 }
361
362 dev_priv->sarea_priv = (drm_i810_sarea_t *)
363 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
364
365 dev_priv->ring.Start = init->ring_start;
366 dev_priv->ring.End = init->ring_end;
367 dev_priv->ring.Size = init->ring_size;
368
369 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
370 dev_priv->ring.map.size = init->ring_size;
371 dev_priv->ring.map.type = _DRM_AGP;
372 dev_priv->ring.map.flags = 0;
373 dev_priv->ring.map.mtrr = 0;
374
375 drm_core_ioremap(&dev_priv->ring.map, dev);
376
377 if (dev_priv->ring.map.handle == NULL) {
378 dev->dev_private = (void *)dev_priv;
379 i810_dma_cleanup(dev);
380 DRM_ERROR("can not ioremap virtual address for"
381 " ring buffer\n");
382 return -ENOMEM;
383 }
384
385 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
386
387 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
388
389 dev_priv->w = init->w;
390 dev_priv->h = init->h;
391 dev_priv->pitch = init->pitch;
392 dev_priv->back_offset = init->back_offset;
393 dev_priv->depth_offset = init->depth_offset;
394 dev_priv->front_offset = init->front_offset;
395
396 dev_priv->overlay_offset = init->overlay_offset;
397 dev_priv->overlay_physical = init->overlay_physical;
398
399 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
400 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
401 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
402
403 /* Program Hardware Status Page */
404 dev_priv->hw_status_page =
405 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
406 &dev_priv->dma_status_page);
407 if (!dev_priv->hw_status_page) {
408 dev->dev_private = (void *)dev_priv;
409 i810_dma_cleanup(dev);
410 DRM_ERROR("Can not allocate hardware status page\n");
411 return -ENOMEM;
412 }
413 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
414 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
415
416 I810_WRITE(0x02080, dev_priv->dma_status_page);
417 DRM_DEBUG("Enabled hardware status page\n");
418
419 /* Now we need to init our freelist */
420 if (i810_freelist_init(dev, dev_priv) != 0) {
421 dev->dev_private = (void *)dev_priv;
422 i810_dma_cleanup(dev);
423 DRM_ERROR("Not enough space in the status page for"
424 " the freelist\n");
425 return -ENOMEM;
426 }
427 dev->dev_private = (void *)dev_priv;
428
429 return 0;
430 }
431
432 static int i810_dma_init(struct drm_device *dev, void *data,
433 struct drm_file *file_priv)
434 {
435 drm_i810_private_t *dev_priv;
436 drm_i810_init_t *init = data;
437 int retcode = 0;
438
439 switch (init->func) {
440 case I810_INIT_DMA_1_4:
441 DRM_INFO("Using v1.4 init.\n");
442 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
443 if (dev_priv == NULL)
444 return -ENOMEM;
445 retcode = i810_dma_initialize(dev, dev_priv, init);
446 break;
447
448 case I810_CLEANUP_DMA:
449 DRM_INFO("DMA Cleanup\n");
450 retcode = i810_dma_cleanup(dev);
451 break;
452 default:
453 return -EINVAL;
454 }
455
456 return retcode;
457 }
458
459 /* Most efficient way to verify state for the i810 is as it is
460 * emitted. Non-conformant state is silently dropped.
461 *
462 * Use 'volatile' & local var tmp to force the emitted values to be
463 * identical to the verified ones.
464 */
465 static void i810EmitContextVerified(struct drm_device * dev,
466 volatile unsigned int *code)
467 {
468 drm_i810_private_t *dev_priv = dev->dev_private;
469 int i, j = 0;
470 unsigned int tmp;
471 RING_LOCALS;
472
473 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
474
475 OUT_RING(GFX_OP_COLOR_FACTOR);
476 OUT_RING(code[I810_CTXREG_CF1]);
477
478 OUT_RING(GFX_OP_STIPPLE);
479 OUT_RING(code[I810_CTXREG_ST1]);
480
481 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
482 tmp = code[i];
483
484 if ((tmp & (7 << 29)) == (3 << 29) &&
485 (tmp & (0x1f << 24)) < (0x1d << 24)) {
486 OUT_RING(tmp);
487 j++;
488 } else
489 printk("constext state dropped!!!\n");
490 }
491
492 if (j & 1)
493 OUT_RING(0);
494
495 ADVANCE_LP_RING();
496 }
497
498 static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code)
499 {
500 drm_i810_private_t *dev_priv = dev->dev_private;
501 int i, j = 0;
502 unsigned int tmp;
503 RING_LOCALS;
504
505 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
506
507 OUT_RING(GFX_OP_MAP_INFO);
508 OUT_RING(code[I810_TEXREG_MI1]);
509 OUT_RING(code[I810_TEXREG_MI2]);
510 OUT_RING(code[I810_TEXREG_MI3]);
511
512 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
513 tmp = code[i];
514
515 if ((tmp & (7 << 29)) == (3 << 29) &&
516 (tmp & (0x1f << 24)) < (0x1d << 24)) {
517 OUT_RING(tmp);
518 j++;
519 } else
520 printk("texture state dropped!!!\n");
521 }
522
523 if (j & 1)
524 OUT_RING(0);
525
526 ADVANCE_LP_RING();
527 }
528
529 /* Need to do some additional checking when setting the dest buffer.
530 */
531 static void i810EmitDestVerified(struct drm_device * dev,
532 volatile unsigned int *code)
533 {
534 drm_i810_private_t *dev_priv = dev->dev_private;
535 unsigned int tmp;
536 RING_LOCALS;
537
538 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
539
540 tmp = code[I810_DESTREG_DI1];
541 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
542 OUT_RING(CMD_OP_DESTBUFFER_INFO);
543 OUT_RING(tmp);
544 } else
545 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
546 tmp, dev_priv->front_di1, dev_priv->back_di1);
547
548 /* invarient:
549 */
550 OUT_RING(CMD_OP_Z_BUFFER_INFO);
551 OUT_RING(dev_priv->zi1);
552
553 OUT_RING(GFX_OP_DESTBUFFER_VARS);
554 OUT_RING(code[I810_DESTREG_DV1]);
555
556 OUT_RING(GFX_OP_DRAWRECT_INFO);
557 OUT_RING(code[I810_DESTREG_DR1]);
558 OUT_RING(code[I810_DESTREG_DR2]);
559 OUT_RING(code[I810_DESTREG_DR3]);
560 OUT_RING(code[I810_DESTREG_DR4]);
561 OUT_RING(0);
562
563 ADVANCE_LP_RING();
564 }
565
566 static void i810EmitState(struct drm_device * dev)
567 {
568 drm_i810_private_t *dev_priv = dev->dev_private;
569 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
570 unsigned int dirty = sarea_priv->dirty;
571
572 DRM_DEBUG("%x\n", dirty);
573
574 if (dirty & I810_UPLOAD_BUFFERS) {
575 i810EmitDestVerified(dev, sarea_priv->BufferState);
576 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
577 }
578
579 if (dirty & I810_UPLOAD_CTX) {
580 i810EmitContextVerified(dev, sarea_priv->ContextState);
581 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
582 }
583
584 if (dirty & I810_UPLOAD_TEX0) {
585 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
586 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
587 }
588
589 if (dirty & I810_UPLOAD_TEX1) {
590 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
591 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
592 }
593 }
594
595 /* need to verify
596 */
597 static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
598 unsigned int clear_color,
599 unsigned int clear_zval)
600 {
601 drm_i810_private_t *dev_priv = dev->dev_private;
602 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
603 int nbox = sarea_priv->nbox;
604 struct drm_clip_rect *pbox = sarea_priv->boxes;
605 int pitch = dev_priv->pitch;
606 int cpp = 2;
607 int i;
608 RING_LOCALS;
609
610 if (dev_priv->current_page == 1) {
611 unsigned int tmp = flags;
612
613 flags &= ~(I810_FRONT | I810_BACK);
614 if (tmp & I810_FRONT)
615 flags |= I810_BACK;
616 if (tmp & I810_BACK)
617 flags |= I810_FRONT;
618 }
619
620 i810_kernel_lost_context(dev);
621
622 if (nbox > I810_NR_SAREA_CLIPRECTS)
623 nbox = I810_NR_SAREA_CLIPRECTS;
624
625 for (i = 0; i < nbox; i++, pbox++) {
626 unsigned int x = pbox->x1;
627 unsigned int y = pbox->y1;
628 unsigned int width = (pbox->x2 - x) * cpp;
629 unsigned int height = pbox->y2 - y;
630 unsigned int start = y * pitch + x * cpp;
631
632 if (pbox->x1 > pbox->x2 ||
633 pbox->y1 > pbox->y2 ||
634 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
635 continue;
636
637 if (flags & I810_FRONT) {
638 BEGIN_LP_RING(6);
639 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
640 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
641 OUT_RING((height << 16) | width);
642 OUT_RING(start);
643 OUT_RING(clear_color);
644 OUT_RING(0);
645 ADVANCE_LP_RING();
646 }
647
648 if (flags & I810_BACK) {
649 BEGIN_LP_RING(6);
650 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
651 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
652 OUT_RING((height << 16) | width);
653 OUT_RING(dev_priv->back_offset + start);
654 OUT_RING(clear_color);
655 OUT_RING(0);
656 ADVANCE_LP_RING();
657 }
658
659 if (flags & I810_DEPTH) {
660 BEGIN_LP_RING(6);
661 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
662 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
663 OUT_RING((height << 16) | width);
664 OUT_RING(dev_priv->depth_offset + start);
665 OUT_RING(clear_zval);
666 OUT_RING(0);
667 ADVANCE_LP_RING();
668 }
669 }
670 }
671
672 static void i810_dma_dispatch_swap(struct drm_device * dev)
673 {
674 drm_i810_private_t *dev_priv = dev->dev_private;
675 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
676 int nbox = sarea_priv->nbox;
677 struct drm_clip_rect *pbox = sarea_priv->boxes;
678 int pitch = dev_priv->pitch;
679 int cpp = 2;
680 int i;
681 RING_LOCALS;
682
683 DRM_DEBUG("swapbuffers\n");
684
685 i810_kernel_lost_context(dev);
686
687 if (nbox > I810_NR_SAREA_CLIPRECTS)
688 nbox = I810_NR_SAREA_CLIPRECTS;
689
690 for (i = 0; i < nbox; i++, pbox++) {
691 unsigned int w = pbox->x2 - pbox->x1;
692 unsigned int h = pbox->y2 - pbox->y1;
693 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
694 unsigned int start = dst;
695
696 if (pbox->x1 > pbox->x2 ||
697 pbox->y1 > pbox->y2 ||
698 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
699 continue;
700
701 BEGIN_LP_RING(6);
702 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
703 OUT_RING(pitch | (0xCC << 16));
704 OUT_RING((h << 16) | (w * cpp));
705 if (dev_priv->current_page == 0)
706 OUT_RING(dev_priv->front_offset + start);
707 else
708 OUT_RING(dev_priv->back_offset + start);
709 OUT_RING(pitch);
710 if (dev_priv->current_page == 0)
711 OUT_RING(dev_priv->back_offset + start);
712 else
713 OUT_RING(dev_priv->front_offset + start);
714 ADVANCE_LP_RING();
715 }
716 }
717
718 static void i810_dma_dispatch_vertex(struct drm_device * dev,
719 struct drm_buf * buf, int discard, int used)
720 {
721 drm_i810_private_t *dev_priv = dev->dev_private;
722 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
723 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
724 struct drm_clip_rect *box = sarea_priv->boxes;
725 int nbox = sarea_priv->nbox;
726 unsigned long address = (unsigned long)buf->bus_address;
727 unsigned long start = address - dev->agp->base;
728 int i = 0;
729 RING_LOCALS;
730
731 i810_kernel_lost_context(dev);
732
733 if (nbox > I810_NR_SAREA_CLIPRECTS)
734 nbox = I810_NR_SAREA_CLIPRECTS;
735
736 if (used > 4 * 1024)
737 used = 0;
738
739 if (sarea_priv->dirty)
740 i810EmitState(dev);
741
742 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
743 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
744
745 *(u32 *) buf_priv->kernel_virtual =
746 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
747
748 if (used & 4) {
749 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
750 used += 4;
751 }
752
753 i810_unmap_buffer(buf);
754 }
755
756 if (used) {
757 do {
758 if (i < nbox) {
759 BEGIN_LP_RING(4);
760 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
761 SC_ENABLE);
762 OUT_RING(GFX_OP_SCISSOR_INFO);
763 OUT_RING(box[i].x1 | (box[i].y1 << 16));
764 OUT_RING((box[i].x2 -
765 1) | ((box[i].y2 - 1) << 16));
766 ADVANCE_LP_RING();
767 }
768
769 BEGIN_LP_RING(4);
770 OUT_RING(CMD_OP_BATCH_BUFFER);
771 OUT_RING(start | BB1_PROTECTED);
772 OUT_RING(start + used - 4);
773 OUT_RING(0);
774 ADVANCE_LP_RING();
775
776 } while (++i < nbox);
777 }
778
779 if (discard) {
780 dev_priv->counter++;
781
782 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
783 I810_BUF_HARDWARE);
784
785 BEGIN_LP_RING(8);
786 OUT_RING(CMD_STORE_DWORD_IDX);
787 OUT_RING(20);
788 OUT_RING(dev_priv->counter);
789 OUT_RING(CMD_STORE_DWORD_IDX);
790 OUT_RING(buf_priv->my_use_idx);
791 OUT_RING(I810_BUF_FREE);
792 OUT_RING(CMD_REPORT_HEAD);
793 OUT_RING(0);
794 ADVANCE_LP_RING();
795 }
796 }
797
798 static void i810_dma_dispatch_flip(struct drm_device * dev)
799 {
800 drm_i810_private_t *dev_priv = dev->dev_private;
801 int pitch = dev_priv->pitch;
802 RING_LOCALS;
803
804 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
805 dev_priv->current_page,
806 dev_priv->sarea_priv->pf_current_page);
807
808 i810_kernel_lost_context(dev);
809
810 BEGIN_LP_RING(2);
811 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
812 OUT_RING(0);
813 ADVANCE_LP_RING();
814
815 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
816 /* On i815 at least ASYNC is buggy */
817 /* pitch<<5 is from 11.2.8 p158,
818 its the pitch / 8 then left shifted 8,
819 so (pitch >> 3) << 8 */
820 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
821 if (dev_priv->current_page == 0) {
822 OUT_RING(dev_priv->back_offset);
823 dev_priv->current_page = 1;
824 } else {
825 OUT_RING(dev_priv->front_offset);
826 dev_priv->current_page = 0;
827 }
828 OUT_RING(0);
829 ADVANCE_LP_RING();
830
831 BEGIN_LP_RING(2);
832 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
833 OUT_RING(0);
834 ADVANCE_LP_RING();
835
836 /* Increment the frame counter. The client-side 3D driver must
837 * throttle the framerate by waiting for this value before
838 * performing the swapbuffer ioctl.
839 */
840 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
841
842 }
843
844 static void i810_dma_quiescent(struct drm_device * dev)
845 {
846 drm_i810_private_t *dev_priv = dev->dev_private;
847 RING_LOCALS;
848
849 i810_kernel_lost_context(dev);
850
851 BEGIN_LP_RING(4);
852 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
853 OUT_RING(CMD_REPORT_HEAD);
854 OUT_RING(0);
855 OUT_RING(0);
856 ADVANCE_LP_RING();
857
858 i810_wait_ring(dev, dev_priv->ring.Size - 8);
859 }
860
861 static int i810_flush_queue(struct drm_device * dev)
862 {
863 drm_i810_private_t *dev_priv = dev->dev_private;
864 struct drm_device_dma *dma = dev->dma;
865 int i, ret = 0;
866 RING_LOCALS;
867
868 i810_kernel_lost_context(dev);
869
870 BEGIN_LP_RING(2);
871 OUT_RING(CMD_REPORT_HEAD);
872 OUT_RING(0);
873 ADVANCE_LP_RING();
874
875 i810_wait_ring(dev, dev_priv->ring.Size - 8);
876
877 for (i = 0; i < dma->buf_count; i++) {
878 struct drm_buf *buf = dma->buflist[i];
879 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
880
881 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
882 I810_BUF_FREE);
883
884 if (used == I810_BUF_HARDWARE)
885 DRM_DEBUG("reclaimed from HARDWARE\n");
886 if (used == I810_BUF_CLIENT)
887 DRM_DEBUG("still on client\n");
888 }
889
890 return ret;
891 }
892
893 /* Must be called with the lock held */
894 static void i810_reclaim_buffers(struct drm_device * dev,
895 struct drm_file *file_priv)
896 {
897 struct drm_device_dma *dma = dev->dma;
898 int i;
899
900 if (!dma)
901 return;
902 if (!dev->dev_private)
903 return;
904 if (!dma->buflist)
905 return;
906
907 i810_flush_queue(dev);
908
909 for (i = 0; i < dma->buf_count; i++) {
910 struct drm_buf *buf = dma->buflist[i];
911 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
912
913 if (buf->file_priv == file_priv && buf_priv) {
914 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
915 I810_BUF_FREE);
916
917 if (used == I810_BUF_CLIENT)
918 DRM_DEBUG("reclaimed from client\n");
919 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
920 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
921 }
922 }
923 }
924
925 static int i810_flush_ioctl(struct drm_device *dev, void *data,
926 struct drm_file *file_priv)
927 {
928 LOCK_TEST_WITH_RETURN(dev, file_priv);
929
930 i810_flush_queue(dev);
931 return 0;
932 }
933
934 static int i810_dma_vertex(struct drm_device *dev, void *data,
935 struct drm_file *file_priv)
936 {
937 struct drm_device_dma *dma = dev->dma;
938 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
939 u32 *hw_status = dev_priv->hw_status_page;
940 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
941 dev_priv->sarea_priv;
942 drm_i810_vertex_t *vertex = data;
943
944 LOCK_TEST_WITH_RETURN(dev, file_priv);
945
946 DRM_DEBUG("idx %d used %d discard %d\n",
947 vertex->idx, vertex->used, vertex->discard);
948
949 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
950 return -EINVAL;
951
952 i810_dma_dispatch_vertex(dev,
953 dma->buflist[vertex->idx],
954 vertex->discard, vertex->used);
955
956 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
957 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
958 sarea_priv->last_enqueue = dev_priv->counter - 1;
959 sarea_priv->last_dispatch = (int)hw_status[5];
960
961 return 0;
962 }
963
964 static int i810_clear_bufs(struct drm_device *dev, void *data,
965 struct drm_file *file_priv)
966 {
967 drm_i810_clear_t *clear = data;
968
969 LOCK_TEST_WITH_RETURN(dev, file_priv);
970
971 /* GH: Someone's doing nasty things... */
972 if (!dev->dev_private) {
973 return -EINVAL;
974 }
975
976 i810_dma_dispatch_clear(dev, clear->flags,
977 clear->clear_color, clear->clear_depth);
978 return 0;
979 }
980
981 static int i810_swap_bufs(struct drm_device *dev, void *data,
982 struct drm_file *file_priv)
983 {
984 DRM_DEBUG("\n");
985
986 LOCK_TEST_WITH_RETURN(dev, file_priv);
987
988 i810_dma_dispatch_swap(dev);
989 return 0;
990 }
991
992 static int i810_getage(struct drm_device *dev, void *data,
993 struct drm_file *file_priv)
994 {
995 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
996 u32 *hw_status = dev_priv->hw_status_page;
997 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
998 dev_priv->sarea_priv;
999
1000 sarea_priv->last_dispatch = (int)hw_status[5];
1001 return 0;
1002 }
1003
1004 static int i810_getbuf(struct drm_device *dev, void *data,
1005 struct drm_file *file_priv)
1006 {
1007 int retcode = 0;
1008 drm_i810_dma_t *d = data;
1009 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1010 u32 *hw_status = dev_priv->hw_status_page;
1011 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1012 dev_priv->sarea_priv;
1013
1014 LOCK_TEST_WITH_RETURN(dev, file_priv);
1015
1016 d->granted = 0;
1017
1018 retcode = i810_dma_get_buffer(dev, d, file_priv);
1019
1020 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1021 task_pid_nr(current), retcode, d->granted);
1022
1023 sarea_priv->last_dispatch = (int)hw_status[5];
1024
1025 return retcode;
1026 }
1027
1028 static int i810_copybuf(struct drm_device *dev, void *data,
1029 struct drm_file *file_priv)
1030 {
1031 /* Never copy - 2.4.x doesn't need it */
1032 return 0;
1033 }
1034
1035 static int i810_docopy(struct drm_device *dev, void *data,
1036 struct drm_file *file_priv)
1037 {
1038 /* Never copy - 2.4.x doesn't need it */
1039 return 0;
1040 }
1041
1042 static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used,
1043 unsigned int last_render)
1044 {
1045 drm_i810_private_t *dev_priv = dev->dev_private;
1046 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1047 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1048 unsigned long address = (unsigned long)buf->bus_address;
1049 unsigned long start = address - dev->agp->base;
1050 int u;
1051 RING_LOCALS;
1052
1053 i810_kernel_lost_context(dev);
1054
1055 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1056 if (u != I810_BUF_CLIENT) {
1057 DRM_DEBUG("MC found buffer that isn't mine!\n");
1058 }
1059
1060 if (used > 4 * 1024)
1061 used = 0;
1062
1063 sarea_priv->dirty = 0x7f;
1064
1065 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1066
1067 dev_priv->counter++;
1068 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1069 DRM_DEBUG("start : %lx\n", start);
1070 DRM_DEBUG("used : %d\n", used);
1071 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1072
1073 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1074 if (used & 4) {
1075 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1076 used += 4;
1077 }
1078
1079 i810_unmap_buffer(buf);
1080 }
1081 BEGIN_LP_RING(4);
1082 OUT_RING(CMD_OP_BATCH_BUFFER);
1083 OUT_RING(start | BB1_PROTECTED);
1084 OUT_RING(start + used - 4);
1085 OUT_RING(0);
1086 ADVANCE_LP_RING();
1087
1088 BEGIN_LP_RING(8);
1089 OUT_RING(CMD_STORE_DWORD_IDX);
1090 OUT_RING(buf_priv->my_use_idx);
1091 OUT_RING(I810_BUF_FREE);
1092 OUT_RING(0);
1093
1094 OUT_RING(CMD_STORE_DWORD_IDX);
1095 OUT_RING(16);
1096 OUT_RING(last_render);
1097 OUT_RING(0);
1098 ADVANCE_LP_RING();
1099 }
1100
1101 static int i810_dma_mc(struct drm_device *dev, void *data,
1102 struct drm_file *file_priv)
1103 {
1104 struct drm_device_dma *dma = dev->dma;
1105 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1106 u32 *hw_status = dev_priv->hw_status_page;
1107 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1108 dev_priv->sarea_priv;
1109 drm_i810_mc_t *mc = data;
1110
1111 LOCK_TEST_WITH_RETURN(dev, file_priv);
1112
1113 if (mc->idx >= dma->buf_count || mc->idx < 0)
1114 return -EINVAL;
1115
1116 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1117 mc->last_render);
1118
1119 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1120 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1121 sarea_priv->last_enqueue = dev_priv->counter - 1;
1122 sarea_priv->last_dispatch = (int)hw_status[5];
1123
1124 return 0;
1125 }
1126
1127 static int i810_rstatus(struct drm_device *dev, void *data,
1128 struct drm_file *file_priv)
1129 {
1130 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1131
1132 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1133 }
1134
1135 static int i810_ov0_info(struct drm_device *dev, void *data,
1136 struct drm_file *file_priv)
1137 {
1138 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1139 drm_i810_overlay_t *ov = data;
1140
1141 ov->offset = dev_priv->overlay_offset;
1142 ov->physical = dev_priv->overlay_physical;
1143
1144 return 0;
1145 }
1146
1147 static int i810_fstatus(struct drm_device *dev, void *data,
1148 struct drm_file *file_priv)
1149 {
1150 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1151
1152 LOCK_TEST_WITH_RETURN(dev, file_priv);
1153 return I810_READ(0x30008);
1154 }
1155
1156 static int i810_ov0_flip(struct drm_device *dev, void *data,
1157 struct drm_file *file_priv)
1158 {
1159 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1160
1161 LOCK_TEST_WITH_RETURN(dev, file_priv);
1162
1163 //Tell the overlay to update
1164 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1165
1166 return 0;
1167 }
1168
1169 /* Not sure why this isn't set all the time:
1170 */
1171 static void i810_do_init_pageflip(struct drm_device * dev)
1172 {
1173 drm_i810_private_t *dev_priv = dev->dev_private;
1174
1175 DRM_DEBUG("\n");
1176 dev_priv->page_flipping = 1;
1177 dev_priv->current_page = 0;
1178 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1179 }
1180
1181 static int i810_do_cleanup_pageflip(struct drm_device * dev)
1182 {
1183 drm_i810_private_t *dev_priv = dev->dev_private;
1184
1185 DRM_DEBUG("\n");
1186 if (dev_priv->current_page != 0)
1187 i810_dma_dispatch_flip(dev);
1188
1189 dev_priv->page_flipping = 0;
1190 return 0;
1191 }
1192
1193 static int i810_flip_bufs(struct drm_device *dev, void *data,
1194 struct drm_file *file_priv)
1195 {
1196 drm_i810_private_t *dev_priv = dev->dev_private;
1197
1198 DRM_DEBUG("\n");
1199
1200 LOCK_TEST_WITH_RETURN(dev, file_priv);
1201
1202 if (!dev_priv->page_flipping)
1203 i810_do_init_pageflip(dev);
1204
1205 i810_dma_dispatch_flip(dev);
1206 return 0;
1207 }
1208
1209 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1210 {
1211 /* i810 has 4 more counters */
1212 dev->counters += 4;
1213 dev->types[6] = _DRM_STAT_IRQ;
1214 dev->types[7] = _DRM_STAT_PRIMARY;
1215 dev->types[8] = _DRM_STAT_SECONDARY;
1216 dev->types[9] = _DRM_STAT_DMA;
1217
1218 return 0;
1219 }
1220
1221 void i810_driver_lastclose(struct drm_device * dev)
1222 {
1223 i810_dma_cleanup(dev);
1224 }
1225
1226 void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1227 {
1228 if (dev->dev_private) {
1229 drm_i810_private_t *dev_priv = dev->dev_private;
1230 if (dev_priv->page_flipping) {
1231 i810_do_cleanup_pageflip(dev);
1232 }
1233 }
1234 }
1235
1236 void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
1237 struct drm_file *file_priv)
1238 {
1239 i810_reclaim_buffers(dev, file_priv);
1240 }
1241
1242 int i810_driver_dma_quiescent(struct drm_device * dev)
1243 {
1244 i810_dma_quiescent(dev);
1245 return 0;
1246 }
1247
1248 struct drm_ioctl_desc i810_ioctls[] = {
1249 DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1250 DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH),
1251 DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH),
1252 DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH),
1253 DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH),
1254 DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH),
1255 DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH),
1256 DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH),
1257 DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH),
1258 DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH),
1259 DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH),
1260 DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH),
1261 DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1262 DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH),
1263 DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH)
1264 };
1265
1266 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1267
1268 /**
1269 * Determine if the device really is AGP or not.
1270 *
1271 * All Intel graphics chipsets are treated as AGP, even if they are really
1272 * PCI-e.
1273 *
1274 * \param dev The device to be tested.
1275 *
1276 * \returns
1277 * A value of 1 is always retured to indictate every i810 is AGP.
1278 */
1279 int i810_driver_device_is_agp(struct drm_device * dev)
1280 {
1281 return 1;
1282 }
Linux with added FPC-III support