2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/i2c-id.h>
31 #include <linux/i2c-algo-bit.h>
34 #include "intel_drv.h"
38 void intel_i2c_quirk_set(struct drm_device
*dev
, bool enable
)
40 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
42 /* When using bit bashing for I2C, this bit needs to be set to 1 */
43 if (!IS_PINEVIEW(dev
))
46 I915_WRITE(DSPCLK_GATE_D
,
47 I915_READ(DSPCLK_GATE_D
) | DPCUNIT_CLOCK_GATE_DISABLE
);
49 I915_WRITE(DSPCLK_GATE_D
,
50 I915_READ(DSPCLK_GATE_D
) & (~DPCUNIT_CLOCK_GATE_DISABLE
));
54 * Intel GPIO access functions
57 #define I2C_RISEFALL_TIME 20
59 static int get_clock(void *data
)
61 struct intel_i2c_chan
*chan
= data
;
62 struct drm_i915_private
*dev_priv
= chan
->drm_dev
->dev_private
;
65 val
= I915_READ(chan
->reg
);
66 return ((val
& GPIO_CLOCK_VAL_IN
) != 0);
69 static int get_data(void *data
)
71 struct intel_i2c_chan
*chan
= data
;
72 struct drm_i915_private
*dev_priv
= chan
->drm_dev
->dev_private
;
75 val
= I915_READ(chan
->reg
);
76 return ((val
& GPIO_DATA_VAL_IN
) != 0);
79 static void set_clock(void *data
, int state_high
)
81 struct intel_i2c_chan
*chan
= data
;
82 struct drm_device
*dev
= chan
->drm_dev
;
83 struct drm_i915_private
*dev_priv
= chan
->drm_dev
->dev_private
;
84 u32 reserved
= 0, clock_bits
;
86 /* On most chips, these bits must be preserved in software. */
87 if (!IS_I830(dev
) && !IS_845G(dev
))
88 reserved
= I915_READ(chan
->reg
) & (GPIO_DATA_PULLUP_DISABLE
|
89 GPIO_CLOCK_PULLUP_DISABLE
);
92 clock_bits
= GPIO_CLOCK_DIR_IN
| GPIO_CLOCK_DIR_MASK
;
94 clock_bits
= GPIO_CLOCK_DIR_OUT
| GPIO_CLOCK_DIR_MASK
|
96 I915_WRITE(chan
->reg
, reserved
| clock_bits
);
97 udelay(I2C_RISEFALL_TIME
); /* wait for the line to change state */
100 static void set_data(void *data
, int state_high
)
102 struct intel_i2c_chan
*chan
= data
;
103 struct drm_device
*dev
= chan
->drm_dev
;
104 struct drm_i915_private
*dev_priv
= chan
->drm_dev
->dev_private
;
105 u32 reserved
= 0, data_bits
;
107 /* On most chips, these bits must be preserved in software. */
108 if (!IS_I830(dev
) && !IS_845G(dev
))
109 reserved
= I915_READ(chan
->reg
) & (GPIO_DATA_PULLUP_DISABLE
|
110 GPIO_CLOCK_PULLUP_DISABLE
);
113 data_bits
= GPIO_DATA_DIR_IN
| GPIO_DATA_DIR_MASK
;
115 data_bits
= GPIO_DATA_DIR_OUT
| GPIO_DATA_DIR_MASK
|
118 I915_WRITE(chan
->reg
, reserved
| data_bits
);
119 udelay(I2C_RISEFALL_TIME
); /* wait for the line to change state */
122 /* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C
123 * engine, but if the BIOS leaves it enabled, then that can break our use
124 * of the bit-banging I2C interfaces. This is notably the case with the
125 * Mac Mini in EFI mode.
128 intel_i2c_reset_gmbus(struct drm_device
*dev
)
130 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
132 if (HAS_PCH_SPLIT(dev
)) {
133 I915_WRITE(PCH_GMBUS0
, 0);
135 I915_WRITE(GMBUS0
, 0);
140 * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
142 * @output: driver specific output device
143 * @reg: GPIO reg to use
144 * @name: name for this bus
145 * @slave_addr: slave address (if fixed)
147 * Creates and registers a new i2c bus with the Linux i2c layer, for use
148 * in output probing and control (e.g. DDC or SDVO control functions).
150 * Possible values for @reg include:
159 * see PRM for details on how these different busses are used.
161 struct i2c_adapter
*intel_i2c_create(struct drm_device
*dev
, const u32 reg
,
164 struct intel_i2c_chan
*chan
;
166 chan
= kzalloc(sizeof(struct intel_i2c_chan
), GFP_KERNEL
);
172 snprintf(chan
->adapter
.name
, I2C_NAME_SIZE
, "intel drm %s", name
);
173 chan
->adapter
.owner
= THIS_MODULE
;
174 chan
->adapter
.algo_data
= &chan
->algo
;
175 chan
->adapter
.dev
.parent
= &dev
->pdev
->dev
;
176 chan
->algo
.setsda
= set_data
;
177 chan
->algo
.setscl
= set_clock
;
178 chan
->algo
.getsda
= get_data
;
179 chan
->algo
.getscl
= get_clock
;
180 chan
->algo
.udelay
= 20;
181 chan
->algo
.timeout
= usecs_to_jiffies(2200);
182 chan
->algo
.data
= chan
;
184 i2c_set_adapdata(&chan
->adapter
, chan
);
186 if(i2c_bit_add_bus(&chan
->adapter
))
189 intel_i2c_reset_gmbus(dev
);
191 /* JJJ: raise SCL and SDA? */
192 intel_i2c_quirk_set(dev
, true);
195 intel_i2c_quirk_set(dev
, false);
198 return &chan
->adapter
;
206 * intel_i2c_destroy - unregister and free i2c bus resources
207 * @output: channel to free
209 * Unregister the adapter from the i2c layer, then free the structure.
211 void intel_i2c_destroy(struct i2c_adapter
*adapter
)
213 struct intel_i2c_chan
*chan
;
218 chan
= container_of(adapter
,
219 struct intel_i2c_chan
,
221 i2c_del_adapter(&chan
->adapter
);