Staging: strip: delete the driver
[linux/fpc-iii.git] / drivers / gpu / drm / i915 / intel_lvds.c
blobb66806a37d37f53ac0a18ae1b536a5db0322c9e3
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds_priv {
45 int fitting_mode;
46 u32 pfit_control;
47 u32 pfit_pgm_ratios;
50 /**
51 * Sets the backlight level.
53 * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
55 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
57 struct drm_i915_private *dev_priv = dev->dev_private;
58 u32 blc_pwm_ctl, reg;
60 if (HAS_PCH_SPLIT(dev))
61 reg = BLC_PWM_CPU_CTL;
62 else
63 reg = BLC_PWM_CTL;
65 blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
66 I915_WRITE(reg, (blc_pwm_ctl |
67 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
70 /**
71 * Returns the maximum level of the backlight duty cycle field.
73 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
75 struct drm_i915_private *dev_priv = dev->dev_private;
76 u32 reg;
78 if (HAS_PCH_SPLIT(dev))
79 reg = BLC_PWM_PCH_CTL2;
80 else
81 reg = BLC_PWM_CTL;
83 return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
84 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
87 /**
88 * Sets the power state for the panel.
90 static void intel_lvds_set_power(struct drm_device *dev, bool on)
92 struct drm_i915_private *dev_priv = dev->dev_private;
93 u32 pp_status, ctl_reg, status_reg, lvds_reg;
95 if (HAS_PCH_SPLIT(dev)) {
96 ctl_reg = PCH_PP_CONTROL;
97 status_reg = PCH_PP_STATUS;
98 lvds_reg = PCH_LVDS;
99 } else {
100 ctl_reg = PP_CONTROL;
101 status_reg = PP_STATUS;
102 lvds_reg = LVDS;
105 if (on) {
106 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
107 POSTING_READ(lvds_reg);
109 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
110 POWER_TARGET_ON);
111 do {
112 pp_status = I915_READ(status_reg);
113 } while ((pp_status & PP_ON) == 0);
115 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
116 } else {
117 intel_lvds_set_backlight(dev, 0);
119 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
120 ~POWER_TARGET_ON);
121 do {
122 pp_status = I915_READ(status_reg);
123 } while (pp_status & PP_ON);
125 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
126 POSTING_READ(lvds_reg);
130 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
132 struct drm_device *dev = encoder->dev;
134 if (mode == DRM_MODE_DPMS_ON)
135 intel_lvds_set_power(dev, true);
136 else
137 intel_lvds_set_power(dev, false);
139 /* XXX: We never power down the LVDS pairs. */
142 static void intel_lvds_save(struct drm_connector *connector)
144 struct drm_device *dev = connector->dev;
145 struct drm_i915_private *dev_priv = dev->dev_private;
146 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
147 u32 pwm_ctl_reg;
149 if (HAS_PCH_SPLIT(dev)) {
150 pp_on_reg = PCH_PP_ON_DELAYS;
151 pp_off_reg = PCH_PP_OFF_DELAYS;
152 pp_ctl_reg = PCH_PP_CONTROL;
153 pp_div_reg = PCH_PP_DIVISOR;
154 pwm_ctl_reg = BLC_PWM_CPU_CTL;
155 } else {
156 pp_on_reg = PP_ON_DELAYS;
157 pp_off_reg = PP_OFF_DELAYS;
158 pp_ctl_reg = PP_CONTROL;
159 pp_div_reg = PP_DIVISOR;
160 pwm_ctl_reg = BLC_PWM_CTL;
163 dev_priv->savePP_ON = I915_READ(pp_on_reg);
164 dev_priv->savePP_OFF = I915_READ(pp_off_reg);
165 dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
166 dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
167 dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
168 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
169 BACKLIGHT_DUTY_CYCLE_MASK);
172 * If the light is off at server startup, just make it full brightness
174 if (dev_priv->backlight_duty_cycle == 0)
175 dev_priv->backlight_duty_cycle =
176 intel_lvds_get_max_backlight(dev);
179 static void intel_lvds_restore(struct drm_connector *connector)
181 struct drm_device *dev = connector->dev;
182 struct drm_i915_private *dev_priv = dev->dev_private;
183 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
184 u32 pwm_ctl_reg;
186 if (HAS_PCH_SPLIT(dev)) {
187 pp_on_reg = PCH_PP_ON_DELAYS;
188 pp_off_reg = PCH_PP_OFF_DELAYS;
189 pp_ctl_reg = PCH_PP_CONTROL;
190 pp_div_reg = PCH_PP_DIVISOR;
191 pwm_ctl_reg = BLC_PWM_CPU_CTL;
192 } else {
193 pp_on_reg = PP_ON_DELAYS;
194 pp_off_reg = PP_OFF_DELAYS;
195 pp_ctl_reg = PP_CONTROL;
196 pp_div_reg = PP_DIVISOR;
197 pwm_ctl_reg = BLC_PWM_CTL;
200 I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
201 I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
202 I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
203 I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
204 I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
205 if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
206 intel_lvds_set_power(dev, true);
207 else
208 intel_lvds_set_power(dev, false);
211 static int intel_lvds_mode_valid(struct drm_connector *connector,
212 struct drm_display_mode *mode)
214 struct drm_device *dev = connector->dev;
215 struct drm_i915_private *dev_priv = dev->dev_private;
216 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
218 if (fixed_mode) {
219 if (mode->hdisplay > fixed_mode->hdisplay)
220 return MODE_PANEL;
221 if (mode->vdisplay > fixed_mode->vdisplay)
222 return MODE_PANEL;
225 return MODE_OK;
228 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
229 struct drm_display_mode *mode,
230 struct drm_display_mode *adjusted_mode)
233 * float point operation is not supported . So the PANEL_RATIO_FACTOR
234 * is defined, which can avoid the float point computation when
235 * calculating the panel ratio.
237 #define PANEL_RATIO_FACTOR 8192
238 struct drm_device *dev = encoder->dev;
239 struct drm_i915_private *dev_priv = dev->dev_private;
240 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
241 struct drm_encoder *tmp_encoder;
242 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
243 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
244 u32 pfit_control = 0, pfit_pgm_ratios = 0;
245 int left_border = 0, right_border = 0, top_border = 0;
246 int bottom_border = 0;
247 bool border = 0;
248 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
249 int horiz_ratio, vert_ratio;
250 u32 hsync_width, vsync_width;
251 u32 hblank_width, vblank_width;
252 u32 hsync_pos, vsync_pos;
254 /* Should never happen!! */
255 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
256 DRM_ERROR("Can't support LVDS on pipe A\n");
257 return false;
260 /* Should never happen!! */
261 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
262 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
263 DRM_ERROR("Can't enable LVDS and another "
264 "encoder on the same pipe\n");
265 return false;
268 /* If we don't have a panel mode, there is nothing we can do */
269 if (dev_priv->panel_fixed_mode == NULL)
270 return true;
272 * If we have timings from the BIOS for the panel, put them in
273 * to the adjusted mode. The CRTC will be set up for this mode,
274 * with the panel scaling set up to source from the H/VDisplay
275 * of the original mode.
277 if (dev_priv->panel_fixed_mode != NULL) {
278 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
279 adjusted_mode->hsync_start =
280 dev_priv->panel_fixed_mode->hsync_start;
281 adjusted_mode->hsync_end =
282 dev_priv->panel_fixed_mode->hsync_end;
283 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
284 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
285 adjusted_mode->vsync_start =
286 dev_priv->panel_fixed_mode->vsync_start;
287 adjusted_mode->vsync_end =
288 dev_priv->panel_fixed_mode->vsync_end;
289 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
290 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
291 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
294 /* Make sure pre-965s set dither correctly */
295 if (!IS_I965G(dev)) {
296 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
297 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
300 /* Native modes don't need fitting */
301 if (adjusted_mode->hdisplay == mode->hdisplay &&
302 adjusted_mode->vdisplay == mode->vdisplay) {
303 pfit_pgm_ratios = 0;
304 border = 0;
305 goto out;
308 /* full screen scale for now */
309 if (HAS_PCH_SPLIT(dev))
310 goto out;
312 /* 965+ wants fuzzy fitting */
313 if (IS_I965G(dev))
314 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
315 PFIT_FILTER_FUZZY;
317 hsync_width = adjusted_mode->crtc_hsync_end -
318 adjusted_mode->crtc_hsync_start;
319 vsync_width = adjusted_mode->crtc_vsync_end -
320 adjusted_mode->crtc_vsync_start;
321 hblank_width = adjusted_mode->crtc_hblank_end -
322 adjusted_mode->crtc_hblank_start;
323 vblank_width = adjusted_mode->crtc_vblank_end -
324 adjusted_mode->crtc_vblank_start;
326 * Deal with panel fitting options. Figure out how to stretch the
327 * image based on its aspect ratio & the current panel fitting mode.
329 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
330 adjusted_mode->vdisplay;
331 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
332 mode->vdisplay;
334 * Enable automatic panel scaling for non-native modes so that they fill
335 * the screen. Should be enabled before the pipe is enabled, according
336 * to register description and PRM.
337 * Change the value here to see the borders for debugging
339 if (!HAS_PCH_SPLIT(dev)) {
340 I915_WRITE(BCLRPAT_A, 0);
341 I915_WRITE(BCLRPAT_B, 0);
344 switch (lvds_priv->fitting_mode) {
345 case DRM_MODE_SCALE_CENTER:
347 * For centered modes, we have to calculate border widths &
348 * heights and modify the values programmed into the CRTC.
350 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
351 right_border = left_border;
352 if (mode->hdisplay & 1)
353 right_border++;
354 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
355 bottom_border = top_border;
356 if (mode->vdisplay & 1)
357 bottom_border++;
358 /* Set active & border values */
359 adjusted_mode->crtc_hdisplay = mode->hdisplay;
360 /* Keep the boder be even */
361 if (right_border & 1)
362 right_border++;
363 /* use the border directly instead of border minuse one */
364 adjusted_mode->crtc_hblank_start = mode->hdisplay +
365 right_border;
366 /* keep the blank width constant */
367 adjusted_mode->crtc_hblank_end =
368 adjusted_mode->crtc_hblank_start + hblank_width;
369 /* get the hsync pos relative to hblank start */
370 hsync_pos = (hblank_width - hsync_width) / 2;
371 /* keep the hsync pos be even */
372 if (hsync_pos & 1)
373 hsync_pos++;
374 adjusted_mode->crtc_hsync_start =
375 adjusted_mode->crtc_hblank_start + hsync_pos;
376 /* keep the hsync width constant */
377 adjusted_mode->crtc_hsync_end =
378 adjusted_mode->crtc_hsync_start + hsync_width;
379 adjusted_mode->crtc_vdisplay = mode->vdisplay;
380 /* use the border instead of border minus one */
381 adjusted_mode->crtc_vblank_start = mode->vdisplay +
382 bottom_border;
383 /* keep the vblank width constant */
384 adjusted_mode->crtc_vblank_end =
385 adjusted_mode->crtc_vblank_start + vblank_width;
386 /* get the vsync start postion relative to vblank start */
387 vsync_pos = (vblank_width - vsync_width) / 2;
388 adjusted_mode->crtc_vsync_start =
389 adjusted_mode->crtc_vblank_start + vsync_pos;
390 /* keep the vsync width constant */
391 adjusted_mode->crtc_vsync_end =
392 adjusted_mode->crtc_vsync_start + vsync_width;
393 border = 1;
394 break;
395 case DRM_MODE_SCALE_ASPECT:
396 /* Scale but preserve the spect ratio */
397 pfit_control |= PFIT_ENABLE;
398 if (IS_I965G(dev)) {
399 /* 965+ is easy, it does everything in hw */
400 if (panel_ratio > desired_ratio)
401 pfit_control |= PFIT_SCALING_PILLAR;
402 else if (panel_ratio < desired_ratio)
403 pfit_control |= PFIT_SCALING_LETTER;
404 else
405 pfit_control |= PFIT_SCALING_AUTO;
406 } else {
408 * For earlier chips we have to calculate the scaling
409 * ratio by hand and program it into the
410 * PFIT_PGM_RATIO register
412 u32 horiz_bits, vert_bits, bits = 12;
413 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
414 adjusted_mode->hdisplay;
415 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
416 adjusted_mode->vdisplay;
417 horiz_scale = adjusted_mode->hdisplay *
418 PANEL_RATIO_FACTOR / mode->hdisplay;
419 vert_scale = adjusted_mode->vdisplay *
420 PANEL_RATIO_FACTOR / mode->vdisplay;
422 /* retain aspect ratio */
423 if (panel_ratio > desired_ratio) { /* Pillar */
424 u32 scaled_width;
425 scaled_width = mode->hdisplay * vert_scale /
426 PANEL_RATIO_FACTOR;
427 horiz_ratio = vert_ratio;
428 pfit_control |= (VERT_AUTO_SCALE |
429 VERT_INTERP_BILINEAR |
430 HORIZ_INTERP_BILINEAR);
431 /* Pillar will have left/right borders */
432 left_border = (adjusted_mode->hdisplay -
433 scaled_width) / 2;
434 right_border = left_border;
435 if (mode->hdisplay & 1) /* odd resolutions */
436 right_border++;
437 /* keep the border be even */
438 if (right_border & 1)
439 right_border++;
440 adjusted_mode->crtc_hdisplay = scaled_width;
441 /* use border instead of border minus one */
442 adjusted_mode->crtc_hblank_start =
443 scaled_width + right_border;
444 /* keep the hblank width constant */
445 adjusted_mode->crtc_hblank_end =
446 adjusted_mode->crtc_hblank_start +
447 hblank_width;
449 * get the hsync start pos relative to
450 * hblank start
452 hsync_pos = (hblank_width - hsync_width) / 2;
453 /* keep the hsync_pos be even */
454 if (hsync_pos & 1)
455 hsync_pos++;
456 adjusted_mode->crtc_hsync_start =
457 adjusted_mode->crtc_hblank_start +
458 hsync_pos;
459 /* keept hsync width constant */
460 adjusted_mode->crtc_hsync_end =
461 adjusted_mode->crtc_hsync_start +
462 hsync_width;
463 border = 1;
464 } else if (panel_ratio < desired_ratio) { /* letter */
465 u32 scaled_height = mode->vdisplay *
466 horiz_scale / PANEL_RATIO_FACTOR;
467 vert_ratio = horiz_ratio;
468 pfit_control |= (HORIZ_AUTO_SCALE |
469 VERT_INTERP_BILINEAR |
470 HORIZ_INTERP_BILINEAR);
471 /* Letterbox will have top/bottom border */
472 top_border = (adjusted_mode->vdisplay -
473 scaled_height) / 2;
474 bottom_border = top_border;
475 if (mode->vdisplay & 1)
476 bottom_border++;
477 adjusted_mode->crtc_vdisplay = scaled_height;
478 /* use border instead of border minus one */
479 adjusted_mode->crtc_vblank_start =
480 scaled_height + bottom_border;
481 /* keep the vblank width constant */
482 adjusted_mode->crtc_vblank_end =
483 adjusted_mode->crtc_vblank_start +
484 vblank_width;
486 * get the vsync start pos relative to
487 * vblank start
489 vsync_pos = (vblank_width - vsync_width) / 2;
490 adjusted_mode->crtc_vsync_start =
491 adjusted_mode->crtc_vblank_start +
492 vsync_pos;
493 /* keep the vsync width constant */
494 adjusted_mode->crtc_vsync_end =
495 adjusted_mode->crtc_vsync_start +
496 vsync_width;
497 border = 1;
498 } else {
499 /* Aspects match, Let hw scale both directions */
500 pfit_control |= (VERT_AUTO_SCALE |
501 HORIZ_AUTO_SCALE |
502 VERT_INTERP_BILINEAR |
503 HORIZ_INTERP_BILINEAR);
505 horiz_bits = (1 << bits) * horiz_ratio /
506 PANEL_RATIO_FACTOR;
507 vert_bits = (1 << bits) * vert_ratio /
508 PANEL_RATIO_FACTOR;
509 pfit_pgm_ratios =
510 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
511 PFIT_VERT_SCALE_MASK) |
512 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
513 PFIT_HORIZ_SCALE_MASK);
515 break;
517 case DRM_MODE_SCALE_FULLSCREEN:
519 * Full scaling, even if it changes the aspect ratio.
520 * Fortunately this is all done for us in hw.
522 pfit_control |= PFIT_ENABLE;
523 if (IS_I965G(dev))
524 pfit_control |= PFIT_SCALING_AUTO;
525 else
526 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
527 VERT_INTERP_BILINEAR |
528 HORIZ_INTERP_BILINEAR);
529 break;
530 default:
531 break;
534 out:
535 lvds_priv->pfit_control = pfit_control;
536 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
538 * When there exists the border, it means that the LVDS_BORDR
539 * should be enabled.
541 if (border)
542 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
543 else
544 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
546 * XXX: It would be nice to support lower refresh rates on the
547 * panels to reduce power consumption, and perhaps match the
548 * user's requested refresh rate.
551 return true;
554 static void intel_lvds_prepare(struct drm_encoder *encoder)
556 struct drm_device *dev = encoder->dev;
557 struct drm_i915_private *dev_priv = dev->dev_private;
558 u32 reg;
560 if (HAS_PCH_SPLIT(dev))
561 reg = BLC_PWM_CPU_CTL;
562 else
563 reg = BLC_PWM_CTL;
565 dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
566 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
567 BACKLIGHT_DUTY_CYCLE_MASK);
569 intel_lvds_set_power(dev, false);
572 static void intel_lvds_commit( struct drm_encoder *encoder)
574 struct drm_device *dev = encoder->dev;
575 struct drm_i915_private *dev_priv = dev->dev_private;
577 if (dev_priv->backlight_duty_cycle == 0)
578 dev_priv->backlight_duty_cycle =
579 intel_lvds_get_max_backlight(dev);
581 intel_lvds_set_power(dev, true);
584 static void intel_lvds_mode_set(struct drm_encoder *encoder,
585 struct drm_display_mode *mode,
586 struct drm_display_mode *adjusted_mode)
588 struct drm_device *dev = encoder->dev;
589 struct drm_i915_private *dev_priv = dev->dev_private;
590 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
591 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
594 * The LVDS pin pair will already have been turned on in the
595 * intel_crtc_mode_set since it has a large impact on the DPLL
596 * settings.
599 if (HAS_PCH_SPLIT(dev))
600 return;
603 * Enable automatic panel scaling so that non-native modes fill the
604 * screen. Should be enabled before the pipe is enabled, according to
605 * register description and PRM.
607 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
608 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
612 * Detect the LVDS connection.
614 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
615 * connected and closed means disconnected. We also send hotplug events as
616 * needed, using lid status notification from the input layer.
618 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
620 struct drm_device *dev = connector->dev;
621 enum drm_connector_status status = connector_status_connected;
623 /* ACPI lid methods were generally unreliable in this generation, so
624 * don't even bother.
626 if (IS_GEN2(dev) || IS_GEN3(dev))
627 return connector_status_connected;
629 return status;
633 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
635 static int intel_lvds_get_modes(struct drm_connector *connector)
637 struct drm_device *dev = connector->dev;
638 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
639 struct drm_i915_private *dev_priv = dev->dev_private;
640 int ret = 0;
642 if (dev_priv->lvds_edid_good) {
643 ret = intel_ddc_get_modes(intel_encoder);
645 if (ret)
646 return ret;
649 /* Didn't get an EDID, so
650 * Set wide sync ranges so we get all modes
651 * handed to valid_mode for checking
653 connector->display_info.min_vfreq = 0;
654 connector->display_info.max_vfreq = 200;
655 connector->display_info.min_hfreq = 0;
656 connector->display_info.max_hfreq = 200;
658 if (dev_priv->panel_fixed_mode != NULL) {
659 struct drm_display_mode *mode;
661 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
662 drm_mode_probed_add(connector, mode);
664 return 1;
667 return 0;
671 * Lid events. Note the use of 'modeset_on_lid':
672 * - we set it on lid close, and reset it on open
673 * - we use it as a "only once" bit (ie we ignore
674 * duplicate events where it was already properly
675 * set/reset)
676 * - the suspend/resume paths will also set it to
677 * zero, since they restore the mode ("lid open").
679 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
680 void *unused)
682 struct drm_i915_private *dev_priv =
683 container_of(nb, struct drm_i915_private, lid_notifier);
684 struct drm_device *dev = dev_priv->dev;
685 struct drm_connector *connector = dev_priv->int_lvds_connector;
688 * check and update the status of LVDS connector after receiving
689 * the LID nofication event.
691 if (connector)
692 connector->status = connector->funcs->detect(connector);
693 if (!acpi_lid_open()) {
694 dev_priv->modeset_on_lid = 1;
695 return NOTIFY_OK;
698 if (!dev_priv->modeset_on_lid)
699 return NOTIFY_OK;
701 dev_priv->modeset_on_lid = 0;
703 mutex_lock(&dev->mode_config.mutex);
704 drm_helper_resume_force_mode(dev);
705 mutex_unlock(&dev->mode_config.mutex);
707 return NOTIFY_OK;
711 * intel_lvds_destroy - unregister and free LVDS structures
712 * @connector: connector to free
714 * Unregister the DDC bus for this connector then free the driver private
715 * structure.
717 static void intel_lvds_destroy(struct drm_connector *connector)
719 struct drm_device *dev = connector->dev;
720 struct intel_encoder *intel_encoder = to_intel_encoder(connector);
721 struct drm_i915_private *dev_priv = dev->dev_private;
723 if (intel_encoder->ddc_bus)
724 intel_i2c_destroy(intel_encoder->ddc_bus);
725 if (dev_priv->lid_notifier.notifier_call)
726 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
727 drm_sysfs_connector_remove(connector);
728 drm_connector_cleanup(connector);
729 kfree(connector);
732 static int intel_lvds_set_property(struct drm_connector *connector,
733 struct drm_property *property,
734 uint64_t value)
736 struct drm_device *dev = connector->dev;
737 struct intel_encoder *intel_encoder =
738 to_intel_encoder(connector);
740 if (property == dev->mode_config.scaling_mode_property &&
741 connector->encoder) {
742 struct drm_crtc *crtc = connector->encoder->crtc;
743 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
744 if (value == DRM_MODE_SCALE_NONE) {
745 DRM_DEBUG_KMS("no scaling not supported\n");
746 return 0;
748 if (lvds_priv->fitting_mode == value) {
749 /* the LVDS scaling property is not changed */
750 return 0;
752 lvds_priv->fitting_mode = value;
753 if (crtc && crtc->enabled) {
755 * If the CRTC is enabled, the display will be changed
756 * according to the new panel fitting mode.
758 drm_crtc_helper_set_mode(crtc, &crtc->mode,
759 crtc->x, crtc->y, crtc->fb);
763 return 0;
766 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
767 .dpms = intel_lvds_dpms,
768 .mode_fixup = intel_lvds_mode_fixup,
769 .prepare = intel_lvds_prepare,
770 .mode_set = intel_lvds_mode_set,
771 .commit = intel_lvds_commit,
774 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
775 .get_modes = intel_lvds_get_modes,
776 .mode_valid = intel_lvds_mode_valid,
777 .best_encoder = intel_best_encoder,
780 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
781 .dpms = drm_helper_connector_dpms,
782 .save = intel_lvds_save,
783 .restore = intel_lvds_restore,
784 .detect = intel_lvds_detect,
785 .fill_modes = drm_helper_probe_single_connector_modes,
786 .set_property = intel_lvds_set_property,
787 .destroy = intel_lvds_destroy,
791 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
793 drm_encoder_cleanup(encoder);
796 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
797 .destroy = intel_lvds_enc_destroy,
800 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
802 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
803 return 1;
806 /* These systems claim to have LVDS, but really don't */
807 static const struct dmi_system_id intel_no_lvds[] = {
809 .callback = intel_no_lvds_dmi_callback,
810 .ident = "Apple Mac Mini (Core series)",
811 .matches = {
812 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
813 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
817 .callback = intel_no_lvds_dmi_callback,
818 .ident = "Apple Mac Mini (Core 2 series)",
819 .matches = {
820 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
821 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
825 .callback = intel_no_lvds_dmi_callback,
826 .ident = "MSI IM-945GSE-A",
827 .matches = {
828 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
829 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
833 .callback = intel_no_lvds_dmi_callback,
834 .ident = "Dell Studio Hybrid",
835 .matches = {
836 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
837 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
841 .callback = intel_no_lvds_dmi_callback,
842 .ident = "AOpen Mini PC",
843 .matches = {
844 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
845 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
849 .callback = intel_no_lvds_dmi_callback,
850 .ident = "AOpen Mini PC MP915",
851 .matches = {
852 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
853 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
857 .callback = intel_no_lvds_dmi_callback,
858 .ident = "Aopen i945GTt-VFA",
859 .matches = {
860 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
864 .callback = intel_no_lvds_dmi_callback,
865 .ident = "Clientron U800",
866 .matches = {
867 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
868 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
872 { } /* terminating entry */
876 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
877 * @dev: drm device
878 * @connector: LVDS connector
880 * Find the reduced downclock for LVDS in EDID.
882 static void intel_find_lvds_downclock(struct drm_device *dev,
883 struct drm_connector *connector)
885 struct drm_i915_private *dev_priv = dev->dev_private;
886 struct drm_display_mode *scan, *panel_fixed_mode;
887 int temp_downclock;
889 panel_fixed_mode = dev_priv->panel_fixed_mode;
890 temp_downclock = panel_fixed_mode->clock;
892 mutex_lock(&dev->mode_config.mutex);
893 list_for_each_entry(scan, &connector->probed_modes, head) {
895 * If one mode has the same resolution with the fixed_panel
896 * mode while they have the different refresh rate, it means
897 * that the reduced downclock is found for the LVDS. In such
898 * case we can set the different FPx0/1 to dynamically select
899 * between low and high frequency.
901 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
902 scan->hsync_start == panel_fixed_mode->hsync_start &&
903 scan->hsync_end == panel_fixed_mode->hsync_end &&
904 scan->htotal == panel_fixed_mode->htotal &&
905 scan->vdisplay == panel_fixed_mode->vdisplay &&
906 scan->vsync_start == panel_fixed_mode->vsync_start &&
907 scan->vsync_end == panel_fixed_mode->vsync_end &&
908 scan->vtotal == panel_fixed_mode->vtotal) {
909 if (scan->clock < temp_downclock) {
911 * The downclock is already found. But we
912 * expect to find the lower downclock.
914 temp_downclock = scan->clock;
918 mutex_unlock(&dev->mode_config.mutex);
919 if (temp_downclock < panel_fixed_mode->clock &&
920 i915_lvds_downclock) {
921 /* We found the downclock for LVDS. */
922 dev_priv->lvds_downclock_avail = 1;
923 dev_priv->lvds_downclock = temp_downclock;
924 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
925 "Normal clock %dKhz, downclock %dKhz\n",
926 panel_fixed_mode->clock, temp_downclock);
928 return;
932 * Enumerate the child dev array parsed from VBT to check whether
933 * the LVDS is present.
934 * If it is present, return 1.
935 * If it is not present, return false.
936 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
937 * Note: The addin_offset should also be checked for LVDS panel.
938 * Only when it is non-zero, it is assumed that it is present.
940 static int lvds_is_present_in_vbt(struct drm_device *dev)
942 struct drm_i915_private *dev_priv = dev->dev_private;
943 struct child_device_config *p_child;
944 int i, ret;
946 if (!dev_priv->child_dev_num)
947 return 1;
949 ret = 0;
950 for (i = 0; i < dev_priv->child_dev_num; i++) {
951 p_child = dev_priv->child_dev + i;
953 * If the device type is not LFP, continue.
954 * If the device type is 0x22, it is also regarded as LFP.
956 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
957 p_child->device_type != DEVICE_TYPE_LFP)
958 continue;
960 /* The addin_offset should be checked. Only when it is
961 * non-zero, it is regarded as present.
963 if (p_child->addin_offset) {
964 ret = 1;
965 break;
968 return ret;
972 * intel_lvds_init - setup LVDS connectors on this device
973 * @dev: drm device
975 * Create the connector, register the LVDS DDC bus, and try to figure out what
976 * modes we can display on the LVDS panel (if present).
978 void intel_lvds_init(struct drm_device *dev)
980 struct drm_i915_private *dev_priv = dev->dev_private;
981 struct intel_encoder *intel_encoder;
982 struct drm_connector *connector;
983 struct drm_encoder *encoder;
984 struct drm_display_mode *scan; /* *modes, *bios_mode; */
985 struct drm_crtc *crtc;
986 struct intel_lvds_priv *lvds_priv;
987 u32 lvds;
988 int pipe, gpio = GPIOC;
990 /* Skip init on machines we know falsely report LVDS */
991 if (dmi_check_system(intel_no_lvds))
992 return;
994 if (!lvds_is_present_in_vbt(dev)) {
995 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
996 return;
999 if (HAS_PCH_SPLIT(dev)) {
1000 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1001 return;
1002 if (dev_priv->edp_support) {
1003 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1004 return;
1006 gpio = PCH_GPIOC;
1009 intel_encoder = kzalloc(sizeof(struct intel_encoder) +
1010 sizeof(struct intel_lvds_priv), GFP_KERNEL);
1011 if (!intel_encoder) {
1012 return;
1015 connector = &intel_encoder->base;
1016 encoder = &intel_encoder->enc;
1017 drm_connector_init(dev, &intel_encoder->base, &intel_lvds_connector_funcs,
1018 DRM_MODE_CONNECTOR_LVDS);
1020 drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
1021 DRM_MODE_ENCODER_LVDS);
1023 drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc);
1024 intel_encoder->type = INTEL_OUTPUT_LVDS;
1026 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
1027 intel_encoder->crtc_mask = (1 << 1);
1028 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1029 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1030 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1031 connector->interlace_allowed = false;
1032 connector->doublescan_allowed = false;
1034 lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1);
1035 intel_encoder->dev_priv = lvds_priv;
1036 /* create the scaling mode property */
1037 drm_mode_create_scaling_mode_property(dev);
1039 * the initial panel fitting mode will be FULL_SCREEN.
1042 drm_connector_attach_property(&intel_encoder->base,
1043 dev->mode_config.scaling_mode_property,
1044 DRM_MODE_SCALE_FULLSCREEN);
1045 lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
1047 * LVDS discovery:
1048 * 1) check for EDID on DDC
1049 * 2) check for VBT data
1050 * 3) check to see if LVDS is already on
1051 * if none of the above, no panel
1052 * 4) make sure lid is open
1053 * if closed, act like it's not there for now
1056 /* Set up the DDC bus. */
1057 intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1058 if (!intel_encoder->ddc_bus) {
1059 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1060 "failed.\n");
1061 goto failed;
1065 * Attempt to get the fixed panel mode from DDC. Assume that the
1066 * preferred mode is the right one.
1068 dev_priv->lvds_edid_good = true;
1070 if (!intel_ddc_get_modes(intel_encoder))
1071 dev_priv->lvds_edid_good = false;
1073 list_for_each_entry(scan, &connector->probed_modes, head) {
1074 mutex_lock(&dev->mode_config.mutex);
1075 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1076 dev_priv->panel_fixed_mode =
1077 drm_mode_duplicate(dev, scan);
1078 mutex_unlock(&dev->mode_config.mutex);
1079 intel_find_lvds_downclock(dev, connector);
1080 goto out;
1082 mutex_unlock(&dev->mode_config.mutex);
1085 /* Failed to get EDID, what about VBT? */
1086 if (dev_priv->lfp_lvds_vbt_mode) {
1087 mutex_lock(&dev->mode_config.mutex);
1088 dev_priv->panel_fixed_mode =
1089 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1090 mutex_unlock(&dev->mode_config.mutex);
1091 if (dev_priv->panel_fixed_mode) {
1092 dev_priv->panel_fixed_mode->type |=
1093 DRM_MODE_TYPE_PREFERRED;
1094 goto out;
1099 * If we didn't get EDID, try checking if the panel is already turned
1100 * on. If so, assume that whatever is currently programmed is the
1101 * correct mode.
1104 /* Ironlake: FIXME if still fail, not try pipe mode now */
1105 if (HAS_PCH_SPLIT(dev))
1106 goto failed;
1108 lvds = I915_READ(LVDS);
1109 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1110 crtc = intel_get_crtc_from_pipe(dev, pipe);
1112 if (crtc && (lvds & LVDS_PORT_EN)) {
1113 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1114 if (dev_priv->panel_fixed_mode) {
1115 dev_priv->panel_fixed_mode->type |=
1116 DRM_MODE_TYPE_PREFERRED;
1117 goto out;
1121 /* If we still don't have a mode after all that, give up. */
1122 if (!dev_priv->panel_fixed_mode)
1123 goto failed;
1125 out:
1126 if (HAS_PCH_SPLIT(dev)) {
1127 u32 pwm;
1128 /* make sure PWM is enabled */
1129 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1130 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1131 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1133 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1134 pwm |= PWM_PCH_ENABLE;
1135 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1137 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1138 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1139 DRM_DEBUG_KMS("lid notifier registration failed\n");
1140 dev_priv->lid_notifier.notifier_call = NULL;
1142 /* keep the LVDS connector */
1143 dev_priv->int_lvds_connector = connector;
1144 drm_sysfs_connector_add(connector);
1145 return;
1147 failed:
1148 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1149 if (intel_encoder->ddc_bus)
1150 intel_i2c_destroy(intel_encoder->ddc_bus);
1151 drm_connector_cleanup(connector);
1152 drm_encoder_cleanup(encoder);
1153 kfree(intel_encoder);