drivers/hwmon/lis3lv02d.h

   1 /*
   2  *  lis3lv02d.h - ST LIS3LV02DL accelerometer driver
   3  *
   4  *  Copyright (C) 2007-2008 Yan Burman
   5  *  Copyright (C) 2008-2009 Eric Piel
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License as published by
   9  *  the Free Software Foundation; either version 2 of the License, or
  10  *  (at your option) any later version.
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21 #include <linux/platform_device.h>
  22 #include <linux/input-polldev.h>
  23
  24 /*
  25  * This driver tries to support the "digital" accelerometer chips from
  26  * STMicroelectronics such as LIS3LV02DL, LIS302DL, LIS3L02DQ, LIS331DL,
  27  * LIS35DE, or LIS202DL. They are very similar in terms of programming, with
  28  * almost the same registers. In addition to differing on physical properties,
  29  * they differ on the number of axes (2/3), precision (8/12 bits), and special
  30  * features (freefall detection, click...). Unfortunately, not all the
  31  * differences can be probed via a register.
  32  * They can be connected either via I²C or SPI.
  33  */
  34
  35 #include <linux/lis3lv02d.h>
  36
  37 enum lis3_reg {
  38         WHO_AM_I        = 0x0F,
  39         OFFSET_X        = 0x16,
  40         OFFSET_Y        = 0x17,
  41         OFFSET_Z        = 0x18,
  42         GAIN_X          = 0x19,
  43         GAIN_Y          = 0x1A,
  44         GAIN_Z          = 0x1B,
  45         CTRL_REG1       = 0x20,
  46         CTRL_REG2       = 0x21,
  47         CTRL_REG3       = 0x22,
  48         HP_FILTER_RESET = 0x23,
  49         STATUS_REG      = 0x27,
  50         OUTX_L          = 0x28,
  51         OUTX_H          = 0x29,
  52         OUTX            = 0x29,
  53         OUTY_L          = 0x2A,
  54         OUTY_H          = 0x2B,
  55         OUTY            = 0x2B,
  56         OUTZ_L          = 0x2C,
  57         OUTZ_H          = 0x2D,
  58         OUTZ            = 0x2D,
  59 };
  60
  61 enum lis302d_reg {
  62         FF_WU_CFG_1     = 0x30,
  63         FF_WU_SRC_1     = 0x31,
  64         FF_WU_THS_1     = 0x32,
  65         FF_WU_DURATION_1 = 0x33,
  66         FF_WU_CFG_2     = 0x34,
  67         FF_WU_SRC_2     = 0x35,
  68         FF_WU_THS_2     = 0x36,
  69         FF_WU_DURATION_2 = 0x37,
  70         CLICK_CFG       = 0x38,
  71         CLICK_SRC       = 0x39,
  72         CLICK_THSY_X    = 0x3B,
  73         CLICK_THSZ      = 0x3C,
  74         CLICK_TIMELIMIT = 0x3D,
  75         CLICK_LATENCY   = 0x3E,
  76         CLICK_WINDOW    = 0x3F,
  77 };
  78
  79 enum lis3lv02d_reg {
  80         FF_WU_CFG       = 0x30,
  81         FF_WU_SRC       = 0x31,
  82         FF_WU_ACK       = 0x32,
  83         FF_WU_THS_L     = 0x34,
  84         FF_WU_THS_H     = 0x35,
  85         FF_WU_DURATION  = 0x36,
  86         DD_CFG          = 0x38,
  87         DD_SRC          = 0x39,
  88         DD_ACK          = 0x3A,
  89         DD_THSI_L       = 0x3C,
  90         DD_THSI_H       = 0x3D,
  91         DD_THSE_L       = 0x3E,
  92         DD_THSE_H       = 0x3F,
  93 };
  94
  95 enum lis3_who_am_i {
  96         WAI_12B         = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */
  97         WAI_8B          = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */
  98         WAI_6B          = 0x52, /* 6 bits: LIS331DLF - not supported */
  99 };
 100
 101 enum lis3lv02d_ctrl1_12b {
 102         CTRL1_Xen       = 0x01,
 103         CTRL1_Yen       = 0x02,
 104         CTRL1_Zen       = 0x04,
 105         CTRL1_ST        = 0x08,
 106         CTRL1_DF0       = 0x10,
 107         CTRL1_DF1       = 0x20,
 108         CTRL1_PD0       = 0x40,
 109         CTRL1_PD1       = 0x80,
 110 };
 111
 112 /* Delta to ctrl1_12b version */
 113 enum lis3lv02d_ctrl1_8b {
 114         CTRL1_STM       = 0x08,
 115         CTRL1_STP       = 0x10,
 116         CTRL1_FS        = 0x20,
 117         CTRL1_PD        = 0x40,
 118         CTRL1_DR        = 0x80,
 119 };
 120
 121 enum lis3lv02d_ctrl2 {
 122         CTRL2_DAS       = 0x01,
 123         CTRL2_SIM       = 0x02,
 124         CTRL2_DRDY      = 0x04,
 125         CTRL2_IEN       = 0x08,
 126         CTRL2_BOOT      = 0x10,
 127         CTRL2_BLE       = 0x20,
 128         CTRL2_BDU       = 0x40, /* Block Data Update */
 129         CTRL2_FS        = 0x80, /* Full Scale selection */
 130 };
 131
 132 enum lis302d_ctrl2 {
 133         HP_FF_WU2       = 0x08,
 134         HP_FF_WU1       = 0x04,
 135 };
 136
 137 enum lis3lv02d_ctrl3 {
 138         CTRL3_CFS0      = 0x01,
 139         CTRL3_CFS1      = 0x02,
 140         CTRL3_FDS       = 0x10,
 141         CTRL3_HPFF      = 0x20,
 142         CTRL3_HPDD      = 0x40,
 143         CTRL3_ECK       = 0x80,
 144 };
 145
 146 enum lis3lv02d_status_reg {
 147         STATUS_XDA      = 0x01,
 148         STATUS_YDA      = 0x02,
 149         STATUS_ZDA      = 0x04,
 150         STATUS_XYZDA    = 0x08,
 151         STATUS_XOR      = 0x10,
 152         STATUS_YOR      = 0x20,
 153         STATUS_ZOR      = 0x40,
 154         STATUS_XYZOR    = 0x80,
 155 };
 156
 157 enum lis3lv02d_ff_wu_cfg {
 158         FF_WU_CFG_XLIE  = 0x01,
 159         FF_WU_CFG_XHIE  = 0x02,
 160         FF_WU_CFG_YLIE  = 0x04,
 161         FF_WU_CFG_YHIE  = 0x08,
 162         FF_WU_CFG_ZLIE  = 0x10,
 163         FF_WU_CFG_ZHIE  = 0x20,
 164         FF_WU_CFG_LIR   = 0x40,
 165         FF_WU_CFG_AOI   = 0x80,
 166 };
 167
 168 enum lis3lv02d_ff_wu_src {
 169         FF_WU_SRC_XL    = 0x01,
 170         FF_WU_SRC_XH    = 0x02,
 171         FF_WU_SRC_YL    = 0x04,
 172         FF_WU_SRC_YH    = 0x08,
 173         FF_WU_SRC_ZL    = 0x10,
 174         FF_WU_SRC_ZH    = 0x20,
 175         FF_WU_SRC_IA    = 0x40,
 176 };
 177
 178 enum lis3lv02d_dd_cfg {
 179         DD_CFG_XLIE     = 0x01,
 180         DD_CFG_XHIE     = 0x02,
 181         DD_CFG_YLIE     = 0x04,
 182         DD_CFG_YHIE     = 0x08,
 183         DD_CFG_ZLIE     = 0x10,
 184         DD_CFG_ZHIE     = 0x20,
 185         DD_CFG_LIR      = 0x40,
 186         DD_CFG_IEND     = 0x80,
 187 };
 188
 189 enum lis3lv02d_dd_src {
 190         DD_SRC_XL       = 0x01,
 191         DD_SRC_XH       = 0x02,
 192         DD_SRC_YL       = 0x04,
 193         DD_SRC_YH       = 0x08,
 194         DD_SRC_ZL       = 0x10,
 195         DD_SRC_ZH       = 0x20,
 196         DD_SRC_IA       = 0x40,
 197 };
 198
 199 struct axis_conversion {
 200         s8      x;
 201         s8      y;
 202         s8      z;
 203 };
 204
 205 struct lis3lv02d {
 206         void                    *bus_priv; /* used by the bus layer only */
 207         int (*init) (struct lis3lv02d *lis3);
 208         int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
 209         int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
 210
 211         int                     *odrs;     /* Supported output data rates */
 212         u8                      odr_mask;  /* ODR bit mask */
 213         u8                      whoami;    /* indicates measurement precision */
 214         s16 (*read_data) (struct lis3lv02d *lis3, int reg);
 215         int                     mdps_max_val;
 216         int                     pwron_delay;
 217         int                     scale; /*
 218                                         * relationship between 1 LBS and mG
 219                                         * (1/1000th of earth gravity)
 220                                         */
 221
 222         struct input_polled_dev *idev;     /* input device */
 223         struct platform_device  *pdev;     /* platform device */
 224         atomic_t                count;     /* interrupt count after last read */
 225         struct axis_conversion  ac;        /* hw -> logical axis */
 226
 227         u32                     irq;       /* IRQ number */
 228         struct fasync_struct    *async_queue; /* queue for the misc device */
 229         wait_queue_head_t       misc_wait; /* Wait queue for the misc device */
 230         unsigned long           misc_opened; /* bit0: whether the device is open */
 231
 232         struct lis3lv02d_platform_data *pdata;  /* for passing board config */
 233         struct mutex            mutex;     /* Serialize poll and selftest */
 234 };
 235
 236 int lis3lv02d_init_device(struct lis3lv02d *lis3);
 237 int lis3lv02d_joystick_enable(void);
 238 void lis3lv02d_joystick_disable(void);
 239 void lis3lv02d_poweroff(struct lis3lv02d *lis3);
 240 void lis3lv02d_poweron(struct lis3lv02d *lis3);
 241 int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
 242
 243 extern struct lis3lv02d lis3_dev;